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Searched refs:VOP_MIRROR_CFG (Results 1 – 25 of 36) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DhalMVOP.c453 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
464 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
470 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
482 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
488 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
884 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
906 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1406 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
1921 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
1924 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
H A DregMVOP.h301 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DhalMVOP.c502 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
513 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
519 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
524 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
538 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
544 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
549 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1005 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1023 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1617 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DhalMVOP.c504 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
515 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
521 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
526 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
540 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
546 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
551 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1007 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1025 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1624 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DhalMVOP.c520 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
532 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
538 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
551 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
557 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
995 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1013 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1536 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2027 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2030 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
H A DregMVOP.h299 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DhalMVOP.c500 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
511 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
517 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
522 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
536 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
542 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
547 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1003 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1021 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1595 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
[all …]
H A DregMVOP.h306 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DhalMVOP.c520 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
532 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
538 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
551 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
557 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
995 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1013 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1536 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2027 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2030 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
H A DregMVOP.h299 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DhalMVOP.c517 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
528 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
534 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
539 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
553 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
559 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
564 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1020 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1038 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1672 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DhalMVOP.c507 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
518 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
524 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
536 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
542 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
982 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1000 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1528 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2015 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2018 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DhalMVOP.c490 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
501 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
507 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
519 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
525 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
926 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
948 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1470 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
1987 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
1990 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DhalMVOP.c503 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
514 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
520 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
532 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
538 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
984 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1002 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1566 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2095 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2098 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
H A DregMVOP.h303 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DhalMVOP.c493 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
504 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
510 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
522 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
528 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
962 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
980 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1504 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
1993 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
1996 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
H A DregMVOP.h299 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DhalMVOP.c509 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
520 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
526 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
531 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
545 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
551 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
556 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1600 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2083 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2086 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DhalMVOP.c501 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
512 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
518 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
530 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
536 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1046 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1626 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2104 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2107 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
3267 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DhalMVOP.c520 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
531 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
537 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
549 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
555 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1031 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1656 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2112 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2115 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
3318 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DhalMVOP.c505 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
516 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
522 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
534 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
540 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1022 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1630 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2072 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2075 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
3269 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DhalMVOP.c500 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
511 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
517 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
529 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
535 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1031 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1613 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2087 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2090 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
3250 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
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/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DhalMVOP.c503 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
514 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
520 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
532 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
538 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
1048 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1628 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2106 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
2109 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
3271 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
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/utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/
H A DhalMVOP.c397 HAL_WriteRegBit(VOP_MIRROR_CFG, bMir, VOP_MIRROR_CFG_ENABLE); in HAL_MVOP_InitMirrorMode()
408 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetVerticalMirrorMode()
414 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_VEN); in HAL_MVOP_SetVerticalMirrorMode()
426 if (VOP_MIRROR_CFG_ENABLE != HAL_ReadRegBit(VOP_MIRROR_CFG, VOP_MIRROR_CFG_ENABLE)) in HAL_MVOP_SetHorizontallMirrorMode()
432 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnable, VOP_MIRROR_CFG_HEN); in HAL_MVOP_SetHorizontallMirrorMode()
824 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, BIT5); in HAL_MVOP_SetInputMode()
1614 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnMirrMaskBase, VOP_MASK_BASE_LSB); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
1617 HAL_WriteRegBit(VOP_MIRROR_CFG, bEnHwFldBase, VOP_HW_FLD_BASE); in HAL_MVOP_Set3DLRAltOutput_VHalfScaling()
H A DregMVOP.h284 #define VOP_MIRROR_CFG (MVOP_REG_BASE + 0x76) macro

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