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Searched refs:VOP_GCLK_MIU_ON (Results 1 – 25 of 36) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DhalMVOP.c555 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
991 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1324 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1564 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_SetEVDHardwireMode()
1660 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1705 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
2950 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
2985 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3041 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3078 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
[all …]
H A DregMVOP.h243 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DhalMVOP.c586 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1024 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1355 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1681 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1729 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3035 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3092 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3128 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3940 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4387 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetInputMode()
[all …]
H A DregMVOP.h243 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DhalMVOP.c586 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1024 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1355 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1681 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1729 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3035 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3092 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3128 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3940 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4392 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetInputMode()
[all …]
H A DregMVOP.h243 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DhalMVOP.c515 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
917 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1233 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1568 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1629 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
2755 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
2825 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3081 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
3482 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetInputMode()
3754 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
H A DregMVOP.h245 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DhalMVOP.c578 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1034 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1416 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1803 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1848 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3114 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3137 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3221 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3244 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3922 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DhalMVOP.c580 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1036 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1417 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1813 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1858 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3123 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3146 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3233 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3256 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3901 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DhalMVOP.c565 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1013 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1386 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1762 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1807 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3073 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3096 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3173 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3196 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3727 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
[all …]
H A DregMVOP.h247 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DhalMVOP.c576 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1032 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1408 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1781 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1826 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3091 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3114 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3194 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3217 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3863 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
[all …]
H A DregMVOP.h250 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DhalMVOP.c593 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1049 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1438 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1861 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1906 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3172 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3195 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3288 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3311 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
4007 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
[all …]
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DhalMVOP.c569 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1011 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1344 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1682 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1727 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
2965 … HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving power) in HAL_MVOP_ResetReg()
3068 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable(1: saving… in HAL_MVOP_ResetReg()
3625 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4079 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetInputMode()
4378 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DhalMVOP.c552 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
959 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1297 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1634 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1695 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
2822 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
2892 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3560 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
3966 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetInputMode()
4260 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DhalMVOP.c563 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1051 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1424 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1773 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1817 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3181 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3232 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3319 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3911 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4647 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DhalMVOP.c582 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1036 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1424 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1787 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1831 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3234 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3280 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3370 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
4136 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4855 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DhalMVOP.c574 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1027 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1404 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1747 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1791 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3189 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3232 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3318 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3918 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4623 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DhalMVOP.c562 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1036 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1413 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1756 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1800 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3164 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3215 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3301 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3918 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4635 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DhalMVOP.c565 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1053 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_SetInputMode()
1426 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1775 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1819 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3184 HAL_WriteRegBit(VOP_UV_SHIFT, 1, VOP_GCLK_MIU_ON); in HAL_MVOP_ResetReg()
3235 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3323 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON);// yc seperate can not enable in HAL_MVOP_ResetReg()
3943 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4679 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DhalMVOP.c585 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1362 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
1754 HAL_WriteRegBit(VOP_UV_SHIFT, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
1800 HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetEVDFeature()
3246 …HAL_WriteRegBit(VOP_UV_SHIFT, 0x0C, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON);// for auto saving power, bu… in HAL_MVOP_ResetReg()
3354 …HAL_WriteRegBit(SUB_REG(VOP_UV_SHIFT), 0x0C, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON);// for auto saving … in HAL_MVOP_ResetReg()
4083 HAL_WriteByteMask(SUB_REG(VOP_GCLK), VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_SubInit()
4819 HAL_WriteRegBit(SUB_REG(VOP_GCLK), 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SubSetOutputTiming()
/utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/
H A DhalMVOP.c459 HAL_WriteByteMask(VOP_GCLK, VOP_GCLK_MIU_ON, VOP_GCLK_MIU_ON|VOP_GCLK_VCLK_ON); in HAL_MVOP_Init()
1098 HAL_WriteRegBit(VOP_GCLK, 0, VOP_GCLK_MIU_ON); in HAL_MVOP_SetOutputTiming()
H A DregMVOP.h242 #define VOP_GCLK_MIU_ON BIT2 //clk_miu use 0: free-run clock; 1: gated clock macro

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