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Searched refs:TOP_CKG_VP6_CLK_MASK (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DhalHVD_EX.c2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2612 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2622 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2632 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_172MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2642 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_144MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2652 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h462 #define TOP_CKG_VP6_CLK_MASK BMASK(3:2) macro