| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_mux.c | 611 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC0); in Hal_SC_mux_dispatch() 618 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch() 632 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 639 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 654 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 662 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 670 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_mux.c | 606 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC0); in Hal_SC_mux_dispatch() 613 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch() 627 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 634 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 649 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 657 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 665 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_mux.c | 597 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC0); in Hal_SC_mux_dispatch() 604 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch() 618 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 625 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 640 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 648 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 656 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_mux.c | 597 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC0); in Hal_SC_mux_dispatch() 604 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch() 618 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 625 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 640 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 648 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 656 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_mux.c | 721 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 729 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 737 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_mux.c | 784 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 792 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 800 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_mux.c | 802 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 810 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 818 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_mux.c | 863 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 871 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 879 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_mux.c | 863 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 871 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 879 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_mux.c | 863 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 871 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 879 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_mux.c | 863 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 871 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 879 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_mux.c | 851 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 859 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 867 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_mux.c | 861 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 869 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch() 877 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP , SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_mux.c | 762 Hal_SC_mux_set_mainwin_ip_mux(pInstance,SC_MAINWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch() 769 Hal_SC_set_subwin_ip_mux(pInstance,SC_SUBWIN_IPMUX_MVOP, SC_CLK_DC0); in Hal_SC_mux_dispatch()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | mhal_mux.h | 219 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | mhal_mux.h | 222 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | mhal_mux.h | 245 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | mhal_mux.h | 245 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | mhal_mux.h | 245 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | mhal_mux.h | 245 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | mhal_mux.h | 239 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | mhal_mux.h | 239 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | mhal_mux.h | 239 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | mhal_mux.h | 239 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | mhal_mux.h | 239 SC_CLK_DC0 = 3, ///< MPEG/DC0 enumerator
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