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Searched refs:RIU_WRITE_BYTE (Results 1 – 25 of 78) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dlc/drv/dlc/include/
H A Ddlc_hwreg_utility2.h122 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _DLC_RIU_BASE + (addr), val) } macro
139 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
145 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
152 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
153 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
165 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
171 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
179 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
181 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
192 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/wble/drv/wble/include/
H A Dwble_hwreg_utility2.h118 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( WBLE_RIU_BASE + (addr), val) } macro
135 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
141 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
148 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
149 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
161 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
167 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
175 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
177 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
188 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/ddc2bi/drv/ddc2bi/include/
H A Dddc2bi_hwreg_utility2.h118 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( DDC2BI_RIU_BASE + (addr), val) } macro
135 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
141 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
148 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
149 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
161 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
167 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
175 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
177 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
188 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_hwreg_utility2.h119 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _VE_RIU_BASE + (addr), val) } macro
140 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
150 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
161 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
162 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
178 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
184 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
196 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
198 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
213 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/hdmi/drv/cec/include/
H A Dcec_hwreg_utility2.h118 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( CEC_RIU_BASE + (addr), val) } macro
135 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
141 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
148 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
149 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
161 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
167 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
175 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
177 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
188 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/pq/drv/pq/include/
H A Dhwreg_utility2.h148 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( PQ_RIU_BASE + (addr), val) }
165 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
171 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
178 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
179 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
191 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
197 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
205 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
207 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
218 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/xc/drv/ace/include/
H A Dace_hwreg_utility2.h128 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _ACE_RIU_BASE + (addr), val) } macro
147 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
153 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
165 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
171 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
179 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
181 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
192 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dxc_hwreg_utility2.h130 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _XC_RIU_BASE + (addr), val) } macro
346 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
352 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
364 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
365 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
377 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
383 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
391 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
393 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
404 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/mustang/sys/
H A DhalDMD_VD_MBX.c110 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
123 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
129 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
136 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
137 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
147 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/maldives/sys/
H A DhalDMD_VD_MBX.c110 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
123 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
129 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
136 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
137 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
147 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/M7821/sys/
H A DhalDMD_VD_MBX.c126 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
139 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
145 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
152 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
153 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
163 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/manhattan/sys/
H A DhalDMD_VD_MBX.c125 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
138 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
144 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
151 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
152 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
162 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/maserati/sys/
H A DhalDMD_VD_MBX.c126 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
139 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
145 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
152 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
153 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
163 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/mooney/sys/
H A DhalDMD_VD_MBX.c110 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
123 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
129 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
136 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
137 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
147 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/M7621/sys/
H A DhalDMD_VD_MBX.c126 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
139 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
145 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
152 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
153 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
163 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/macan/sys/
H A DhalDMD_VD_MBX.c125 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
138 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
144 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
151 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
152 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
162 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/maxim/sys/
H A DhalDMD_VD_MBX.c126 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
139 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
145 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
152 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
153 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
163 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/k7u/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
140 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
146 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
153 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
154 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
164 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/k6/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
140 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
146 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
153 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
154 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
164 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/mainz/sys/
H A DhalDMD_VD_MBX.c111 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
124 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
130 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
137 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
138 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
148 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/k6lite/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
140 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
146 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
153 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
154 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
164 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/curry/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
140 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
146 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
153 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
154 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
164 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/kano/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
140 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
146 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
153 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
154 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
164 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/sys/hal/messi/sys/
H A DhalDMD_VD_MBX.c111 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
124 …RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) -…
130 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
137 … RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
138 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
148 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_common.c125 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _hal_DMD.virtDMDBaseAddr + (addr), val) } macro
139 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) -…
145 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
152 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
153 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
163 …RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1)…

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