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Searched refs:REG_TOP_UART_SEL0 (Results 1 – 25 of 68) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DhalHVD_sub.c2344 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2349 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2351 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
H A DhalHVD.c2565 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2570 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2572 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
H A DregHVD.h413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DhalHVD_sub.c2344 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2349 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2351 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
H A DhalHVD.c2565 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2570 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2572 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
H A DregHVD.h413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DhalHVD_sub.c2344 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2349 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2351 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
H A DhalHVD.c2565 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2570 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2572 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
H A DregHVD.h413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DhalHVD_sub.c2344 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2349 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2351 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
H A DhalHVD.c2565 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2570 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2572 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
H A DregHVD.h413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DhalHVD_sub.c2344 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2349 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2351 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
H A DhalHVD.c2565 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2570 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2572 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
H A DregHVD.h413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DhalHVD_sub.c2344 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2349 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
2351 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_Sub_UartSwitch2FW()
H A DhalHVD.c2565 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_VD_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2570 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_MHEG5, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
2572 _HVD_WriteWordMask(REG_TOP_UART_SEL0, REG_TOP_UART_SEL_PIU_0, REG_TOP_UART_SEL_0_MASK); in HAL_HVD_UartSwitch2FW()
H A DregHVD.h413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DregHVD_EX.h511 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DregHVD_EX.h511 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DregHVD_EX.h533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DregHVD_EX.h533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DregHVD_EX.h533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DregHVD_EX.h515 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DregHVD_EX.h533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1)) macro

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