Searched refs:REG_TOP_TS4TS5_CFG (Results 1 – 8 of 8) sorted by relevance
265 #define REG_TOP_TS4TS5_CFG 0x40UL macro572 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSO_Recover_TSOutMode()584 … _stOutPadCtrl.u16TSOutModeOld[u8Eng] = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & REG_TOP_TS_OUT_MODE_MASK; in HAL_TSO_OutPad()586 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) |… in HAL_TSO_OutPad()590 … if(((TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & REG_TOP_TS_OUT_MODE_MASK) == REG_TOP_TS1_OUT_MODE_TSO) in HAL_TSO_OutPad()690 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSO_SelPad()702 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSO_SelPad()2122 _u16TSOTopReg[1][1] = TSP_TOP_REG(REG_TOP_TS4TS5_CFG); in HAL_TSO_SaveRegs()2148 TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = _u16TSOTopReg[1][1]; in HAL_TSO_RestoreRegs()
260 #define REG_TOP_TS4TS5_CFG 0x40UL macro475 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSO_Recover_TSOutMode()495 … _stOutPadCtrl.u16TSOutModeOld[u8Eng] = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & REG_TOP_TS_OUT_MODE_MASK; in HAL_TSO_OutPad()497 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) |… in HAL_TSO_OutPad()514 if((TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & REG_TOP_TS_OUT_MODE_MASK) == REG_TOP_TS1_OUT_MODE_TSO) in HAL_TSO_OutPad()606 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSO_SelPad()618 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSO_SelPad()
268 #define REG_TOP_TS4TS5_CFG 0x40UL macro503 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSO_Recover_TSOutMode()523 … _stOutPadCtrl.u16TSOutModeOld[u8Eng] = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & REG_TOP_TS_OUT_MODE_MASK; in HAL_TSO_OutPad()525 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) |… in HAL_TSO_OutPad()540 if((TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & REG_TOP_TS_OUT_MODE_MASK) == REG_TOP_TS1_OUT_MODE_TSO) in HAL_TSO_OutPad()634 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSO_SelPad()646 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSO_SelPad()
315 #define REG_TOP_TS4TS5_CFG 0x40UL macro1964 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSP_TsOutPadCfg()2068 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK; //d… in HAL_TSP_SelPad()2085 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()2094 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()
329 #define REG_TOP_TS4TS5_CFG 0x40UL macro1986 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSP_TsOutPadCfg()2090 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK; //d… in HAL_TSP_SelPad()2107 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()2116 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()
340 #define REG_TOP_TS4TS5_CFG 0x40UL macro2075 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSP_TsOutPadCfg()2194 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK; //d… in HAL_TSP_SelPad()2211 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()2220 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()
340 #define REG_TOP_TS4TS5_CFG 0x40UL macro2036 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = (TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK) | … in HAL_TSP_TsOutPadCfg()2155 …TSP_TOP_REG(REG_TOP_TS4TS5_CFG) = TSP_TOP_REG(REG_TOP_TS4TS5_CFG) & ~REG_TOP_TS_OUT_MODE_MASK; //d… in HAL_TSP_SelPad()2172 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()2181 u16Reg = REG_TOP_TS4TS5_CFG; in HAL_TSP_SelPad()