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Searched refs:REG_MIU_SEL_FROM_IP (Results 1 – 25 of 33) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DhalMVOP.c3375 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3376 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3377 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3381 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3382 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3383 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h428 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DhalMVOP.c3539 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3540 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3541 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3545 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3546 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3547 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h443 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DhalMVOP.c3520 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3521 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3522 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3526 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3527 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3528 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h455 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DhalMVOP.c3506 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3507 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3508 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3512 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3513 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3514 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h435 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DhalMVOP.c3480 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3481 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3482 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3488 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3489 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3490 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h437 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DhalMVOP.c3509 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3510 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3511 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3515 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3516 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3517 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h442 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DhalMVOP.c3506 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3507 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3508 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3512 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3513 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3514 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
H A DregMVOP.h435 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DhalMVOP.c3677 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop
3678 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0
3679 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1
3683 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop
3684 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0
3685 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DhalMVOP.c3675 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop
3676 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0
3677 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1
3681 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop
3682 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0
3683 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DhalMVOP.c3665 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop
3666 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0
3667 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1
3671 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop
3672 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0
3673 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DhalMVOP.c3614 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop
3615 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0
3616 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1
3620 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop
3621 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0
3622 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DhalMVOP.c3659 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop
3660 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0
3661 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1
3665 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop
3666 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0
3667 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1
H A DregMVOP.h471 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22)
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DhalMVOP.c3681 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop
3682 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0
3683 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1
3687 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop
3688 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0
3689 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DhalMVOP.c3581 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3582 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3583 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, 1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
3587 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMVOP0, MVOP_MIU_IP_SEL); //mvop in HAL_SetSCFEMIUIPSel()
3588 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC0, MFDEC0_MIU_IP_SEL); //mfdec0 in HAL_SetSCFEMIUIPSel()
3589 HAL_WriteRegBit(REG_MIU_SEL_FROM_IP, stIPSel->bMFDEC1, MFDEC1_MIU_IP_SEL); //mfdec1 in HAL_SetSCFEMIUIPSel()
/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DregMVOP.h417 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DregMVOP.h458 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DregMVOP.h447 #define REG_MIU_SEL_FROM_IP (SC_FE_REG_BASE + 0x22) macro

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