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Searched refs:REG_MIPS_FIQ_FINAL_STATUS (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/
H A DregIRQ.h176 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x2C*2) //[IRQ][HAL][003] Status bit… macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
365 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/
H A DregIRQ.h176 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x2C*2) macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
365 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/
H A DregIRQ.h176 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x2C*2) macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/
H A DregIRQ.h176 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x2C*2) macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/
H A DregIRQ.h176 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x2C*2) macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/
H A DregIRQ.h176 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x2C*2) //[IRQ][HAL][003] Status bit… macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/mustang/irq/
H A DregIRQ.h138 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x4C*2) macro
170 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
188 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
204 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
220 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/maldives/irq/
H A DregIRQ.h138 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + 0x4C*2) macro
170 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
188 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
204 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
220 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/mainz/irq/
H A DregIRQ.h128 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x002C << 1)) macro
160 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/mooney/irq/
H A DregIRQ.h128 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x002C << 1)) macro
160 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/messi/irq/
H A DregIRQ.h128 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x002C << 1)) macro
160 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/
H A DregIRQ.h136 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x4c << 1)) macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/
H A DregIRQ.h136 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x4c << 1)) macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/
H A DregIRQ.h136 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x4c << 1)) macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/
H A DregIRQ.h136 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x4c << 1)) macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/
H A DregIRQ.h136 #define REG_MIPS_FIQ_FINAL_STATUS (RIUBASE_IRQ + (0x4c << 1)) macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS