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Searched refs:REG_HDMI_DUAL_0_BASE (Results 1 – 25 of 27) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h5709 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5710 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5711 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5712 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5713 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5714 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5715 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5716 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5717 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5718 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h601 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h5711 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5712 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5713 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5714 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5715 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5716 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5717 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5718 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5719 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5720 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h583 #define REG_HDMI_DUAL_0_BASE 0x172300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h5701 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5702 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5703 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5704 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5705 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5706 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5707 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5708 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5709 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5710 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h561 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h5711 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5712 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5713 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5714 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5715 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5716 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5717 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5718 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5719 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5720 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h585 #define REG_HDMI_DUAL_0_BASE 0x172300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h5701 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5702 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5703 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5704 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5705 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5706 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5707 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5708 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5709 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5710 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h588 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h5711 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5712 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5713 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5714 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5715 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5716 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5717 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5718 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5719 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5720 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h577 #define REG_HDMI_DUAL_0_BASE 0x172300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h5711 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5712 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5713 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5714 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5715 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5716 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5717 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5718 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5719 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5720 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h583 #define REG_HDMI_DUAL_0_BASE 0x172300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h5701 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5702 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5703 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5704 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5705 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5706 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5707 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5708 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5709 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5710 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h559 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h5702 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5703 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5704 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5705 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5706 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5707 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5708 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5709 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5710 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5711 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h542 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h5701 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5702 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5703 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5704 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5705 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5706 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5707 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5708 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5709 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5710 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h635 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h5709 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5710 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5711 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5712 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5713 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5714 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5715 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5716 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5717 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5718 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h647 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h5709 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5710 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5711 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5712 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5713 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5714 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5715 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5716 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5717 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5718 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h5709 #define REG_HDMI_DUAL_0_00_L (REG_HDMI_DUAL_0_BASE + 0x00)
5710 #define REG_HDMI_DUAL_0_00_H (REG_HDMI_DUAL_0_BASE + 0x01)
5711 #define REG_HDMI_DUAL_0_01_L (REG_HDMI_DUAL_0_BASE + 0x02)
5712 #define REG_HDMI_DUAL_0_01_H (REG_HDMI_DUAL_0_BASE + 0x03)
5713 #define REG_HDMI_DUAL_0_02_L (REG_HDMI_DUAL_0_BASE + 0x04)
5714 #define REG_HDMI_DUAL_0_02_H (REG_HDMI_DUAL_0_BASE + 0x05)
5715 #define REG_HDMI_DUAL_0_03_L (REG_HDMI_DUAL_0_BASE + 0x06)
5716 #define REG_HDMI_DUAL_0_03_H (REG_HDMI_DUAL_0_BASE + 0x07)
5717 #define REG_HDMI_DUAL_0_04_L (REG_HDMI_DUAL_0_BASE + 0x08)
5718 #define REG_HDMI_DUAL_0_04_H (REG_HDMI_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h652 #define REG_HDMI_DUAL_0_BASE 0x173000UL macro

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