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Searched refs:REG_HDMI2_DUAL_0_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h5967 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5968 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5969 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5970 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5971 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5972 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5973 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5974 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5975 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5976 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h602 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h5969 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5970 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5971 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5972 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5973 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5974 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5975 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5976 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5977 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5978 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h584 #define REG_HDMI2_DUAL_0_BASE 0x172400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h5959 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5960 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5961 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5962 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5963 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5964 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5965 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5966 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5967 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5968 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h562 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h5969 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5970 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5971 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5972 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5973 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5974 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5975 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5976 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5977 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5978 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h586 #define REG_HDMI2_DUAL_0_BASE 0x172400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h5959 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5960 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5961 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5962 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5963 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5964 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5965 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5966 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5967 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5968 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h589 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h5969 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5970 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5971 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5972 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5973 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5974 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5975 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5976 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5977 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5978 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h578 #define REG_HDMI2_DUAL_0_BASE 0x172400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h5969 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5970 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5971 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5972 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5973 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5974 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5975 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5976 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5977 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5978 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h584 #define REG_HDMI2_DUAL_0_BASE 0x172400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h5959 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5960 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5961 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5962 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5963 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5964 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5965 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5966 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5967 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5968 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h560 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h5960 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5961 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5962 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5963 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5964 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5965 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5966 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5967 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5968 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5969 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h543 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h5959 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5960 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5961 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5962 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5963 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5964 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5965 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5966 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5967 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5968 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h636 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h5967 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5968 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5969 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5970 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5971 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5972 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5973 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5974 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5975 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5976 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h648 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h5967 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5968 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5969 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5970 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5971 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5972 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5973 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5974 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5975 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5976 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h5967 #define REG_HDMI2_DUAL_0_00_L (REG_HDMI2_DUAL_0_BASE + 0x00)
5968 #define REG_HDMI2_DUAL_0_00_H (REG_HDMI2_DUAL_0_BASE + 0x01)
5969 #define REG_HDMI2_DUAL_0_01_L (REG_HDMI2_DUAL_0_BASE + 0x02)
5970 #define REG_HDMI2_DUAL_0_01_H (REG_HDMI2_DUAL_0_BASE + 0x03)
5971 #define REG_HDMI2_DUAL_0_02_L (REG_HDMI2_DUAL_0_BASE + 0x04)
5972 #define REG_HDMI2_DUAL_0_02_H (REG_HDMI2_DUAL_0_BASE + 0x05)
5973 #define REG_HDMI2_DUAL_0_03_L (REG_HDMI2_DUAL_0_BASE + 0x06)
5974 #define REG_HDMI2_DUAL_0_03_H (REG_HDMI2_DUAL_0_BASE + 0x07)
5975 #define REG_HDMI2_DUAL_0_04_L (REG_HDMI2_DUAL_0_BASE + 0x08)
5976 #define REG_HDMI2_DUAL_0_04_H (REG_HDMI2_DUAL_0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h653 #define REG_HDMI2_DUAL_0_BASE 0x173100UL macro

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