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Searched refs:REG_DACPLL_BASE (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dhwreg_dac.h102 #define REG_DACPLL_BASE (0x121100) macro
123 #define REG_DAC_PLL_15_L (REG_DACPLL_BASE + 0x2A)
124 #define REG_DAC_PLL_15_H (REG_DACPLL_BASE + 0x2B)
125 #define REG_DAC_PLL_16_L (REG_DACPLL_BASE + 0x2C)
126 #define REG_DAC_PLL_16_H (REG_DACPLL_BASE + 0x2D)
127 #define REG_DAC_PLL_17_L (REG_DACPLL_BASE + 0x2E)
128 #define REG_DAC_PLL_17_H (REG_DACPLL_BASE + 0x2F)
129 #define REG_DAC_PLL_31_L (REG_DACPLL_BASE + 0x62)
130 #define REG_DAC_PLL_31_H (REG_DACPLL_BASE + 0x63)
131 #define REG_DAC_PLL_32_L (REG_DACPLL_BASE + 0x64)
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/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dhwreg_dac.h102 #define REG_DACPLL_BASE (0x121100) macro
123 #define REG_DAC_PLL_15_L (REG_DACPLL_BASE + 0x2A)
124 #define REG_DAC_PLL_15_H (REG_DACPLL_BASE + 0x2B)
125 #define REG_DAC_PLL_16_L (REG_DACPLL_BASE + 0x2C)
126 #define REG_DAC_PLL_16_H (REG_DACPLL_BASE + 0x2D)
127 #define REG_DAC_PLL_17_L (REG_DACPLL_BASE + 0x2E)
128 #define REG_DAC_PLL_17_H (REG_DACPLL_BASE + 0x2F)
129 #define REG_DAC_PLL_31_L (REG_DACPLL_BASE + 0x62)
130 #define REG_DAC_PLL_31_H (REG_DACPLL_BASE + 0x63)
131 #define REG_DAC_PLL_32_L (REG_DACPLL_BASE + 0x64)
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/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dhwreg_dac.h102 #define REG_DACPLL_BASE (0x121100) macro
123 #define REG_DAC_PLL_15_L (REG_DACPLL_BASE + 0x2A)
124 #define REG_DAC_PLL_15_H (REG_DACPLL_BASE + 0x2B)
125 #define REG_DAC_PLL_16_L (REG_DACPLL_BASE + 0x2C)
126 #define REG_DAC_PLL_16_H (REG_DACPLL_BASE + 0x2D)
127 #define REG_DAC_PLL_17_L (REG_DACPLL_BASE + 0x2E)
128 #define REG_DAC_PLL_17_H (REG_DACPLL_BASE + 0x2F)
129 #define REG_DAC_PLL_31_L (REG_DACPLL_BASE + 0x62)
130 #define REG_DAC_PLL_31_H (REG_DACPLL_BASE + 0x63)
131 #define REG_DAC_PLL_32_L (REG_DACPLL_BASE + 0x64)
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/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dhwreg_dac.h102 #define REG_DACPLL_BASE (0x121100) macro
123 #define REG_DAC_PLL_15_L (REG_DACPLL_BASE + 0x2A)
124 #define REG_DAC_PLL_15_H (REG_DACPLL_BASE + 0x2B)
125 #define REG_DAC_PLL_16_L (REG_DACPLL_BASE + 0x2C)
126 #define REG_DAC_PLL_16_H (REG_DACPLL_BASE + 0x2D)
127 #define REG_DAC_PLL_17_L (REG_DACPLL_BASE + 0x2E)
128 #define REG_DAC_PLL_17_H (REG_DACPLL_BASE + 0x2F)
129 #define REG_DAC_PLL_31_L (REG_DACPLL_BASE + 0x62)
130 #define REG_DAC_PLL_31_H (REG_DACPLL_BASE + 0x63)
131 #define REG_DAC_PLL_32_L (REG_DACPLL_BASE + 0x64)
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