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Searched refs:REG_COMBO_PHY0_P3_60_L (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c948 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
962 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
968 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1763 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c959 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
973 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
979 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1793 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1006 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1015 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1021 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1832 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c959 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
973 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
979 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1793 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1020 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1034 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1040 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1839 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1006 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1015 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1021 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1832 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c951 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
965 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
971 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1766 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c951 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
965 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
971 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1766 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1086 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1100 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1106 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1932 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c951 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
965 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
971 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1766 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1086 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(5)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1100 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, BIT(11)|BIT(4)|BIT(1), BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1106 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, 0, BIT(11)|BIT(4)|BIT(1)); in _Hal_tmds_EQBandWidthSetting()
1932 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, (bSettingFlag0? BIT(5): 0), BIT(5)); in _Hal_tmds_AutoEQ14ModeChange()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c650 W2BYTE(REG_COMBO_PHY0_P3_60_L, 0); in _mhal_mhl_Mhl24bitsModeSetting()
1738 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c650 W2BYTE(REG_COMBO_PHY0_P3_60_L, 0); in _mhal_mhl_Mhl24bitsModeSetting()
1738 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c650 W2BYTE(REG_COMBO_PHY0_P3_60_L, 0); in _mhal_mhl_Mhl24bitsModeSetting()
1738 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c650 W2BYTE(REG_COMBO_PHY0_P3_60_L, 0); in _mhal_mhl_Mhl24bitsModeSetting()
1738 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c650 W2BYTE(REG_COMBO_PHY0_P3_60_L, 0); in _mhal_mhl_Mhl24bitsModeSetting()
1738 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c1709 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c1725 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5)); in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3237 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3239 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3237 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3239 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3237 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3239 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3239 #define REG_COMBO_PHY0_P3_60_L (REG_COMBO_PHY0_P3_BASE + 0xC0) macro

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