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Searched refs:REG_COMBO_PHY0_P2_6F_L (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c455 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
563 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c459 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
575 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c462 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
608 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c462 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
608 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c462 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
608 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c462 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
608 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c462 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write in _mhal_mhl_HdmiBypassModeSetting()
608 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c919 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
940 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c930 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
951 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c930 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
951 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c991 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
1012 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c922 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
943 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c922 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
943 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1057 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
1078 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c922 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
943 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1057 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(11), BIT(11)); // atop_gc_rctrl_pll_ove, overwirte enable in _Hal_tmds_EQBandWidthSetting()
1078 … W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(11)); // atop_gc_rctrl_pll_ove, overwrite disable in _Hal_tmds_EQBandWidthSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2753 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2753 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2753 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2753 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2752 #define REG_COMBO_PHY0_P2_6F_L (REG_COMBO_PHY0_P2_BASE + 0xDE) macro

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