Home
last modified time | relevance | path

Searched refs:REG_CLKGEN1_STC5_CW_EN (Results 1 – 2 of 2) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c2328 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) &= ~(REG_CLKGEN1_STC5_CW_EN); in HAL_TSP_STC_Init()
2329 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) |= REG_CLKGEN1_STC5_CW_EN; in HAL_TSP_STC_Init()
2330 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) &= ~(REG_CLKGEN1_STC5_CW_EN); in HAL_TSP_STC_Init()
2482 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) &= ~(REG_CLKGEN1_STC5_CW_EN); in HAL_TSP_SetSTCSynth()
2483 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) |= REG_CLKGEN1_STC5_CW_EN; in HAL_TSP_SetSTCSynth()
2484 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) &= ~(REG_CLKGEN1_STC5_CW_EN); in HAL_TSP_SetSTCSynth()
H A DregTSP.h181 #define REG_CLKGEN1_STC5_CW_EN 0x0400 macro