Searched refs:REG_CLKGEN0_TS6_SHIFT (Results 1 – 2 of 2) sorted by relevance
531 …S6_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_Power()625 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_Power()902 …(REG_CLKGEN0_TS6_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS6_SHIFT)) | (clk_src<<(REG_CLKGEN0_TS… in HAL_TSP_TSIF_SelPad()949 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()978 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1031 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1077 …N0_REG(REG_CLKGEN0_TS6_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS6_SHIFT)) >> (REG_CLKGEN0_TS6_SH… in HAL_TSP_TSIF_SelPad_ClkDis()1114 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
104 #define REG_CLKGEN0_TS6_SHIFT 0 macro