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Searched refs:REG_CKG_DAC2 (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/
H A DhalPWS.c303 …HAL_PWS_WriteByte(REG_CKG_DAC2, ((HAL_PWS_ReadByte(REG_CKG_DAC2) & ~CKG_DAC2_MASK) | CKG_DAC2_XTAL… in PwsPowerMonitorThread()
321 …HAL_PWS_WriteByte(REG_CKG_DAC2, (HAL_PWS_ReadByte(REG_CKG_DAC2) & ~CKG_DAC2_MASK) | CKG_DAC2_CLK_H… in PwsPowerMonitorThread()
H A DregPWS.h165 #define REG_CKG_DAC2 (0x100BB3) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/
H A DhalPWS.c303 …HAL_PWS_WriteByte(REG_CKG_DAC2, ((HAL_PWS_ReadByte(REG_CKG_DAC2) & ~CKG_DAC2_MASK) | CKG_DAC2_XTAL… in PwsPowerMonitorThread()
321 …HAL_PWS_WriteByte(REG_CKG_DAC2, (HAL_PWS_ReadByte(REG_CKG_DAC2) & ~CKG_DAC2_MASK) | CKG_DAC2_CLK_H… in PwsPowerMonitorThread()
H A DregPWS.h165 #define REG_CKG_DAC2 (0x100BB3) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A DhalDAC.c737 …W2BYTE(L_BK_CHIPTOP(REG_CKG_DAC2), (~bEnable), REG_CKG_DAC2_DISABLE_MASK); //set clock MUX for R/G… in Hal_DAC_Enable()
846 W1BYTE(H_BK_CHIPTOP(REG_CKG_DAC2), DacClk, 3:2); in Hal_DAC_SetOutputSource()
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dhwreg_dac.h143 #define REG_CKG_DAC2 (0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dhwreg_dac.h143 #define REG_CKG_DAC2 (0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dhwreg_dac.h143 #define REG_CKG_DAC2 (0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dhwreg_dac.h143 #define REG_CKG_DAC2 (0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A DhalDAC.c1157 …W2BYTE(L_BK_CHIPTOP(REG_CKG_DAC2), (~bEnable), REG_CKG_DAC2_DISABLE_MASK); //set clock MUX for R/G… in Hal_DAC_Enable()
1266 W1BYTE(H_BK_CHIPTOP(REG_CKG_DAC2), DacClk, 3:2); in Hal_DAC_SetOutputSource()
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A DhalDAC.c1160 …W2BYTE(L_BK_CHIPTOP(REG_CKG_DAC2), (~bEnable), REG_CKG_DAC2_DISABLE_MASK); //set clock MUX for R/G… in Hal_DAC_Enable()
1269 W1BYTE(H_BK_CHIPTOP(REG_CKG_DAC2), DacClk, 3:2); in Hal_DAC_SetOutputSource()
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A DhalDAC.c1160 …W2BYTE(L_BK_CHIPTOP(REG_CKG_DAC2), (~bEnable), REG_CKG_DAC2_DISABLE_MASK); //set clock MUX for R/G… in Hal_DAC_Enable()
1269 W1BYTE(H_BK_CHIPTOP(REG_CKG_DAC2), DacClk, 3:2); in Hal_DAC_SetOutputSource()