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Searched refs:NPM_REG_CHIPTOP (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
152 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP + 0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/
H A DregCPU.h116 #define NPM_REG_CHIPTOP 0x001E00 //0x101E00 //chiptop macro
147 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP + 0x00A6)
/utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
152 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP + 0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
152 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP + 0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/
H A DregCPU.h116 #define NPM_REG_CHIPTOP 0x001E00 //0x101E00 //chiptop macro
147 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP + 0x00A6)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
151 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
151 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
152 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
151 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/
H A DregCPU.h117 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
151 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/
H A DregCPU.h122 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
180 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/
H A DregCPU.h122 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
180 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/
H A DregCPU.h129 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
190 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/
H A DregCPU.h131 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
193 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/
H A DregCPU.h129 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
190 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/
H A DregCPU.h130 #define NPM_REG_CHIPTOP 0x001E00UL //0x101E00 //chiptop macro
191 #define NPM_REG_CHIPTOP_UART (NPM_REG_CHIPTOP+0x00A6UL)