Searched refs:E_INT_FIQ_0xC0_START (Results 1 – 3 of 3) sorted by relevance
| /utopia/UTPA2-700.0.x/projects/tmplib/include/ |
| H A D | MsIRQ.h | 363 E_INT_FIQ_0xC0_START = 0xC0, enumerator
364 E_INT_FIQ_DMARD = E_INT_FIQ_0xC0_START+0, //U3
365 E_INT_FIQ_AU_DMA_BUF_INT = E_INT_FIQ_0xC0_START+1, //T3
366 E_INT_FIQ_8051_TO_MIPS_VPE1 = E_INT_FIQ_0xC0_START+2, //T3
367 E_INT_FIQ_DVI_DET = E_INT_FIQ_0xC0_START+3, //M10
368 E_INT_FIQ_PM_GPIO0 = E_INT_FIQ_0xC0_START+4, //M10
369 E_INT_FIQ_PM_GPIO1 = E_INT_FIQ_0xC0_START+5, //M10
370 E_INT_FIQ_PM_GPIO2 = E_INT_FIQ_0xC0_START+6, //M10
371 E_INT_FIQ_PM_GPIO3 = E_INT_FIQ_0xC0_START+7, //M10
372 E_INT_FIQ_PM_XIU_TIMEOUT = E_INT_FIQ_0xC0_START+8, //M10
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| /utopia/UTPA2-700.0.x/mxlib/include/ |
| H A D | MsIRQ.h | 364 E_INT_FIQ_0xC0_START = 0xC0, enumerator
365 E_INT_FIQ_DMARD = E_INT_FIQ_0xC0_START+0, //U3
366 E_INT_FIQ_AU_DMA_BUF_INT = E_INT_FIQ_0xC0_START+1, //T3
367 E_INT_FIQ_8051_TO_MIPS_VPE1 = E_INT_FIQ_0xC0_START+2, //T3
368 E_INT_FIQ_DVI_DET = E_INT_FIQ_0xC0_START+3, //M10
369 E_INT_FIQ_PM_GPIO0 = E_INT_FIQ_0xC0_START+4, //M10
370 E_INT_FIQ_PM_GPIO1 = E_INT_FIQ_0xC0_START+5, //M10
371 E_INT_FIQ_PM_GPIO2 = E_INT_FIQ_0xC0_START+6, //M10
372 E_INT_FIQ_PM_GPIO3 = E_INT_FIQ_0xC0_START+7, //M10
373 E_INT_FIQ_PM_XIU_TIMEOUT = E_INT_FIQ_0xC0_START+8, //M10
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| /utopia/UTPA2-700.0.x/projects/build/ |
| H A D | preprocess.txt | 31507 E_INT_FIQ_0xC0_START = 0xC0,
31508 E_INT_FIQ_DMARD = E_INT_FIQ_0xC0_START+0,
31509 E_INT_FIQ_AU_DMA_BUF_INT = E_INT_FIQ_0xC0_START+1,
31510 E_INT_FIQ_8051_TO_MIPS_VPE1 = E_INT_FIQ_0xC0_START+2,
31511 E_INT_FIQ_DVI_DET = E_INT_FIQ_0xC0_START+3,
31512 E_INT_FIQ_PM_GPIO0 = E_INT_FIQ_0xC0_START+4,
31513 E_INT_FIQ_PM_GPIO1 = E_INT_FIQ_0xC0_START+5,
31514 E_INT_FIQ_PM_GPIO2 = E_INT_FIQ_0xC0_START+6,
31515 E_INT_FIQ_PM_GPIO3 = E_INT_FIQ_0xC0_START+7,
31516 E_INT_FIQ_PM_XIU_TIMEOUT = E_INT_FIQ_0xC0_START+8,
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