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Searched refs:ENABLE_CFTOP_P_SEL_MASK (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/tcf/
H A DhalTCF.c165 …_REG32_W( Reg32_Clk_cftop_p_sel, (_REG32_R( Reg32_Clk_cftop_p_sel)&~ENABLE_CFTOP_P_SEL_MASK) | ENA… in HAL_CF_Clk()
169 …_REG32_W( Reg32_Clk_cftop_p_sel, (_REG32_R( Reg32_Clk_cftop_p_sel)&~ENABLE_CFTOP_P_SEL_MASK) | ENA… in HAL_CF_Clk()
H A DregTCF.h141 #define ENABLE_CFTOP_P_SEL_MASK 0x00000300 //[9:8] 00: xtail 12M clock, 01: 54M clock, others:… macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/tcf/
H A DhalTCF.c165 …_REG32_W( Reg32_Clk_cftop_p_sel, (_REG32_R( Reg32_Clk_cftop_p_sel)&~ENABLE_CFTOP_P_SEL_MASK) | ENA… in HAL_CF_Clk()
169 …_REG32_W( Reg32_Clk_cftop_p_sel, (_REG32_R( Reg32_Clk_cftop_p_sel)&~ENABLE_CFTOP_P_SEL_MASK) | ENA… in HAL_CF_Clk()
H A DregTCF.h141 #define ENABLE_CFTOP_P_SEL_MASK 0x00000300 //[9:8] 00: xtail 12M clock, 01: 54M clock, others:… macro