Searched refs:DBG_AUTO_TS_DATA_RATE (Results 1 – 4 of 4) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 168 #define DBG_AUTO_TS_DATA_RATE(x) macro
1530 …DBG_AUTO_TS_DATA_RATE(printf(">>>TS_DATA_RATE_CHANGE Detected: TsClkDivNum = 0x%x<<<\n", u8TSDivNu… in INTERN_DVBT2_Lock()
2853 …DBG_AUTO_TS_DATA_RATE(printf("[dvbt2] TS_DATA_RATE_total = 0x%x %d \n\n", TS_DATA_RATE, TS_DATA_… in INTERN_DVBT2_GetTsDivNum()
2868 DBG_AUTO_TS_DATA_RATE(printf(" CLK Source: 172 MHz \n")); in INTERN_DVBT2_GetTsDivNum()
2880 DBG_AUTO_TS_DATA_RATE(printf(" CLK Source: 288 MHz \n")); in INTERN_DVBT2_GetTsDivNum()
2890 DBG_AUTO_TS_DATA_RATE(printf(">>>INTERN_DVBT2_GetTsDivNum = 0x%x<<<\n", *u8TSDivNum)); in INTERN_DVBT2_GetTsDivNum()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 172 #define DBG_AUTO_TS_DATA_RATE(x) macro
2860 …DBG_AUTO_TS_DATA_RATE(printf("[dvbt2] TS_DATA_RATE_total = 0x%x %d \n\n", TS_DATA_RATE, TS_DATA_… in INTERN_DVBT2_GetTsDivNum()
2875 DBG_AUTO_TS_DATA_RATE(printf(" CLK Source: 288 MHz \n")); in INTERN_DVBT2_GetTsDivNum()
2889 DBG_AUTO_TS_DATA_RATE(printf(">>>INTERN_DVBT2_GetTsDivNum = 0x%x<<<\n", *u8TSDivNum)); in INTERN_DVBT2_GetTsDivNum()
2910 …DBG_AUTO_TS_DATA_RATE(printf(">>>TS_DATA_RATE_CHANGE Detected: TsClkDivNum = 0x%x<<<\n", u8TSDivNu… in INTERN_DVBT2_ConfigAdaptiveTsDivNum()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 171 #define DBG_AUTO_TS_DATA_RATE(x) macro
3149 …DBG_AUTO_TS_DATA_RATE(printf("[dvbt2] TS_DATA_RATE_total = 0x%x %d \n\n", TS_DATA_RATE, TS_DATA_… in INTERN_DVBT2_GetTsDivNum()
3164 DBG_AUTO_TS_DATA_RATE(printf(" CLK Source: 288 MHz \n")); in INTERN_DVBT2_GetTsDivNum()
3178 DBG_AUTO_TS_DATA_RATE(printf(">>>INTERN_DVBT2_GetTsDivNum = 0x%x<<<\n", *u8TSDivNum)); in INTERN_DVBT2_GetTsDivNum()
3199 …DBG_AUTO_TS_DATA_RATE(printf(">>>TS_DATA_RATE_CHANGE Detected: TsClkDivNum = 0x%x<<<\n", u8TSDivNu… in INTERN_DVBT2_ConfigAdaptiveTsDivNum()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 171 #define DBG_AUTO_TS_DATA_RATE(x) macro
3149 …DBG_AUTO_TS_DATA_RATE(printf("[dvbt2] TS_DATA_RATE_total = 0x%x %d \n\n", TS_DATA_RATE, TS_DATA_… in INTERN_DVBT2_GetTsDivNum()
3164 DBG_AUTO_TS_DATA_RATE(printf(" CLK Source: 288 MHz \n")); in INTERN_DVBT2_GetTsDivNum()
3178 DBG_AUTO_TS_DATA_RATE(printf(">>>INTERN_DVBT2_GetTsDivNum = 0x%x<<<\n", *u8TSDivNum)); in INTERN_DVBT2_GetTsDivNum()
3199 …DBG_AUTO_TS_DATA_RATE(printf(">>>TS_DATA_RATE_CHANGE Detected: TsClkDivNum = 0x%x<<<\n", u8TSDivNu… in INTERN_DVBT2_ConfigAdaptiveTsDivNum()
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