Home
last modified time | relevance | path

Searched refs:CKG_S2_IDCLK2_XTAL (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h891 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h873 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h937 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_ip.c256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c303 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
310 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_ip.c256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_ip.c256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c260 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
267 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_ip.c259 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
266 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_ip.c260 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
267 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_ip.c259 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
266 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_ip.c256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h1052 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h1007 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h1064 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h1001 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h1069 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h1056 #define CKG_S2_IDCLK2_XTAL CKG_S2_IDCLK2_ODCLK macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo.c1247 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // in… in _MApi_XC_Init_WithoutCreateMutex()
H A Dmvideo.c.01244 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // in…