1 //<MStar Software>
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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94 #define MHAL_IP_C
95
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include "MsCommon.h"
102 #include "MsIRQ.h"
103 #include "MsOS.h"
104 #include "mhal_xc_chip_config.h"
105 #include "utopia.h"
106 #include "utopia_dapi.h"
107 // Internal Definition
108 #include "drvXC_IOPort.h"
109 #include "apiXC.h"
110 #include "mvideo_context.h"
111 #include "xc_Analog_Reg.h"
112 #include "mhal_ip.h"
113 #include "apiXC_Adc.h"
114 #include "apiXC_Auto.h"
115 #include "drvXC_ADC_Internal.h"
116 #include "drvXC_HDMI_if.h"
117 #include "apiXC_ModeParse.h"
118 #include "apiXC_PCMonitor.h"
119 #include "drv_sc_ip.h"
120 #include "drv_sc_display.h"
121 #include "drv_sc_isr.h"
122 #if (LD_ENABLE==1)
123 #include "mdrv_ld.h"
124 #include "mdrv_ldalgo.h"
125 #endif
126 #include "mdrv_sc_3d.h"
127 #include "drv_sc_menuload.h"
128 #include "mhal_sc.h"
129 #if FRC_INSIDE
130 #include "mdrv_frc.h"
131 #include "mhal_frc.h"
132 #endif
133 #include "mhal_adc.h"
134 #include "xc_hwreg_utility2.h"
135 #include "hwreg_sc.h"
136 #include "hwreg_ipmux.h"
137 #include "XC_private.h"
138 #include "hwreg_adc_atop.h"
139 #include "hwreg_adc_dtop.h"
140 //-------------------------------------------------------------------------------------------------
141 // Driver Compiler Options
142 //-------------------------------------------------------------------------------------------------
143
144
145 //-------------------------------------------------------------------------------------------------
146 // Local Defines
147 //-------------------------------------------------------------------------------------------------
148 #define DRVSCIP_DBG(x) //x
149
150
151 //-------------------------------------------------------------------------------------------------
152 // Local Structures
153 //-------------------------------------------------------------------------------------------------
154
155
156 //-------------------------------------------------------------------------------------------------
157 // Global Variables
158 //-------------------------------------------------------------------------------------------------
159
160
161
162 //-------------------------------------------------------------------------------------------------
163 // Local Variables
164 //-------------------------------------------------------------------------------------------------
165
166
167 //-------------------------------------------------------------------------------------------------
168 // Debug Functions
169 //-------------------------------------------------------------------------------------------------
170
171
172 //-------------------------------------------------------------------------------------------------
173 // Local Functions
174 //-------------------------------------------------------------------------------------------------
175
176
177 //-------------------------------------------------------------------------------------------------
178 // Global Functions
179 //-------------------------------------------------------------------------------------------------
180
181
182 /******************************************************************************/
183 ///software reset for scaler
184 ///@param u16Sel \b IN
185 ///- software reset VDFE: BIT(15)
186 ///- software reset VDCOMBF: BIT(14)
187 ///- software reset EMCU: BIT(13)
188 ///- software reset GMC: BIT(12)
189 ///- software reset REG: BIT(7)
190 ///- software reset ADC: BIT(6)
191 ///- software reset DIGITAL: BIT(5)
192 ///- software reset SCALER: BIT(4)
193 ///- software reset DISPLAY: BIT(3)
194 ///- software reset OSD: BIT(1)
195 ///- software reset ALL: BIT(0)
196 ///@param u8DelayTime \b IN:
197 ///- software reset delay time
198 /******************************************************************************/
Hal_SC_ip_software_reset(void * pInstance,MS_U8 u8Reset,SCALER_WIN eWindow)199 void Hal_SC_ip_software_reset(void *pInstance, MS_U8 u8Reset, SCALER_WIN eWindow)
200 {
201 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
202 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
203
204 if(psXCInstPri->u32DeviceID == E_XC_DEVICE0)
205 {
206 MS_U8 u8CLK1Mux = MDrv_ReadByte(REG_CKG_IDCLK1); //Sub window
207 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_IDCLK2); //Main window
208
209 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK00_02_L, u8Reset, 0xFF );
210
211 MsOS_DelayTask(1);
212 if(u8Reset == REST_IP_F1) //Sub window
213 {
214 MDrv_WriteByteMask(REG_CKG_IDCLK1, CKG_IDCLK1_XTAL, CKG_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
215 MDrv_WriteByteMask(REG_CKG_IDCLK1, u8CLK1Mux, CKG_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
216 }
217 else if(u8Reset == REST_IP_F2) //Main window
218 {
219 MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
220 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
221 }
222 else if(u8Reset == REST_IP_ALL) //Main and sub windows
223 {
224 MDrv_WriteByteMask(REG_CKG_IDCLK1, CKG_IDCLK1_XTAL, CKG_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
225 MDrv_WriteByteMask(REG_CKG_IDCLK1, u8CLK1Mux, CKG_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
226 MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
227 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
228 }
229
230 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK00_02_L, 0x00, 0xFF );
231
232 if (MDrv_ReadByte(REG_CHIP_REVISION) == 0)//u01 pip hw bug
233 {
234 if(Hal_SC_Is_subwindow_enable(pInstance))//when sub was enabled, set REG_SC_BK46_3F_bit0 "0", because hw reset "1" on this bit.
235 {
236 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK46_3F_L, 0, BIT(0));
237 }
238 }
239
240 MsOS_DelayTask(1);
241 }
242 else
243 {
244 MS_U8 u8CLK1Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK1); //Sub window
245 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window
246
247 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK00_02_L, u8Reset, 0xFF );
248 MsOS_DelayTask(1);
249 if(u8Reset == REST_IP_F1) //Sub window
250 {
251 MDrv_WriteByteMask(REG_CKG_S2_IDCLK1, CKG_S2_IDCLK1_XTAL, CKG_S2_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
252 MDrv_WriteByteMask(REG_CKG_S2_IDCLK1, u8CLK1Mux, CKG_S2_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
253 }
254 else if(u8Reset == REST_IP_F2) //Main window
255 {
256 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
257 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
258 }
259 else if(u8Reset == REST_IP_ALL) //Main and sub windows
260 {
261 MDrv_WriteByteMask(REG_CKG_S2_IDCLK1, CKG_S2_IDCLK1_XTAL, CKG_S2_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
262 MDrv_WriteByteMask(REG_CKG_S2_IDCLK1, u8CLK1Mux, CKG_S2_IDCLK1_MASK); // Sub window reset to XTAL when ADC input no signal
263 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
264 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL when ADC input no signal
265 }
266 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK00_02_L, 0x00, 0xFF );
267 MsOS_DelayTask(1);
268 }
269 }
270
Hal_SC_ip_get_sync_flag(void * pInstance,SCALER_WIN eWindow)271 MS_U8 Hal_SC_ip_get_sync_flag(void *pInstance, SCALER_WIN eWindow)
272 {
273 //MS_U8 u8Bank;
274 MS_U8 u8SyncFlag;
275 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
276 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
277
278 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
279
280 if(eWindow == MAIN_WINDOW)
281 {
282 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
283 //u8SyncFlag = MDrv_ReadByte(L_BK_IP1F2(0x1E));
284 u8SyncFlag = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_1E_L) & 0x00FF;
285 }
286 else
287 {
288 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
289 //u8SyncFlag = MDrv_ReadByte(L_BK_IP1F1(0x1E));
290 u8SyncFlag = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_1E_L) & 0x00FF;
291 }
292 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
293 return u8SyncFlag;
294 }
295
Hal_SC_ip_get_sync_detect_status(void * pInstance,SCALER_WIN eWindow)296 MS_U8 Hal_SC_ip_get_sync_detect_status(void *pInstance, SCALER_WIN eWindow)
297 {
298 MS_U8 u8DetectStatus;
299 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
300 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
301
302 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
303
304 /* mode detect status */
305 if(eWindow == MAIN_WINDOW)
306 {
307 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
308 //u8DetectStatus = MDrv_ReadByte(H_BK_IP1F2(0x1E));
309 u8DetectStatus = (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_1E_L) & 0xFF00)>>8;
310 }
311 else
312 {
313 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
314 //u8DetectStatus = MDrv_ReadByte(H_BK_IP1F1(0x1E));
315 u8DetectStatus = (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_1E_L) & 0xFF00)>>8;
316 }
317
318 //MDrv_WriteByte( BK_SELECT_00, u8Bank );
319 return u8DetectStatus;
320 }
321
Hal_SC_ip_get_input_vsync_polarity(void * pInstance)322 MS_U8 Hal_SC_ip_get_input_vsync_polarity(void *pInstance)
323 {
324 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
325 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
326 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_1E_L) & BIT(8)) ? 1:0;
327 }
328
Hal_SC_ip_get_input_vsync_value(void * pInstance,SCALER_WIN eWindow)329 MS_U8 Hal_SC_ip_get_input_vsync_value(void *pInstance, SCALER_WIN eWindow)
330 {
331 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
332 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
333 return (Hal_SC_ip_get_sync_flag(pInstance, eWindow) & BIT(2)) ? 1:0;
334 }
335
Hal_SC_ip_get_output_vsync_value(void * pInstance,SCALER_WIN eWindow)336 MS_U8 Hal_SC_ip_get_output_vsync_value(void *pInstance, SCALER_WIN eWindow)
337 {
338 // For Active Low case, BIT(0) = 0 means Vsync, so return true means get Vsync
339 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
340 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
341 return (Hal_SC_ip_get_sync_flag(pInstance, eWindow) & BIT(0)) ? 0 : 1;
342 }
343
Hal_SC_ip_set_reg_usr_vspolmd(void * pInstance,MS_U8 u8Enable,SCALER_WIN eWindow)344 void Hal_SC_ip_set_reg_usr_vspolmd(void *pInstance, MS_U8 u8Enable, SCALER_WIN eWindow )
345 {
346 //MS_U8 u8Bank;
347 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
348 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
349 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
350
351 if(eWindow == MAIN_WINDOW)
352 {
353 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
354 //MDrv_WriteRegBit(H_BK_IP1F2(0x21), u8Enable, BIT(4));
355 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_21_L, u8Enable ? BIT(12) : 0, BIT(12));
356 }
357 else
358 {
359 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
360 //MDrv_WriteRegBit(H_BK_IP1F1(0x21), u8Enable, BIT(4));
361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12));
362 }
363
364 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
365 }
366
Hal_SC_ip_init_reg_in_timingchange(void * pInstance,SCALER_WIN eWindow)367 void Hal_SC_ip_init_reg_in_timingchange(void *pInstance, SCALER_WIN eWindow)
368 {
369 //MS_U8 u8Bank;
370 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
371 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
372
373 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
374
375 if(eWindow == MAIN_WINDOW)
376 {
377 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
378 //MDrv_WriteByte(L_BK_IP1F2(0x21), 0x00);
379 //MDrv_WriteByteMask(H_BK_IP1F2(0x21), 0x00 , BIT(0) );
380 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_21_L,0x0000,0x01FF);
381
382 // reset 3D setting
383 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK02_63_L, 0x0000);
384 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_7F_L, 0x00, BIT(15));
385 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_30_L, 0x00, BIT(0));
386 }
387 else
388 {
389 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
390 //MDrv_WriteByte(L_BK_IP1F1(0x21), 0x00);
391 //MDrv_WriteByteMask(H_BK_IP1F1(0x21), 0x00 , BIT(0) );
392 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF);
393 }
394
395 // restore coast window to default settings
396 Hal_SC_ip_set_coast_window( pInstance, 0x0C, 0x0C, eWindow );
397
398 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
399 }
400
401 /******************************************************************************/
402 ///This function will return Horizontal period value
403 ///@return
404 ///- MS_U16 Horizontal Period
405 /******************************************************************************/
Hal_SC_ip_get_horizontalPeriod(void * pInstance,SCALER_WIN eWindow)406 MS_U16 Hal_SC_ip_get_horizontalPeriod(void *pInstance, SCALER_WIN eWindow)
407 {
408 //MS_U8 u8Bank;
409 MS_U16 u16HorizontalPeriod;
410 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
411 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
412
413 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
414
415 if(eWindow == MAIN_WINDOW)
416 {
417 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
418 //u16HorizontalPeriod = ( MDrv_Read2Byte( L_BK_IP1F2(0x20)) & MST_H_PERIOD_MASK );
419 u16HorizontalPeriod = ( SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK01_20_L) & MST_H_PERIOD_MASK );
420 }
421 else
422 {
423 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
424 //u16HorizontalPeriod = ( MDrv_Read2Byte( L_BK_IP1F1(0x20)) & MST_H_PERIOD_MASK );
425 u16HorizontalPeriod = ( SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK03_20_L) & MST_H_PERIOD_MASK );
426 }
427
428 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
429
430 return u16HorizontalPeriod;
431 }
432
433
434 /******************************************************************************/
435 ///This function will return Vertical total value
436 ///@return
437 ///- MS_U16 Vertical total
438 /******************************************************************************/
Hal_SC_ip_get_verticaltotal(void * pInstance,SCALER_WIN eWindow)439 MS_U16 Hal_SC_ip_get_verticaltotal(void *pInstance, SCALER_WIN eWindow)
440 {
441 //MS_U8 u8Bank;
442 MS_U16 u16VerticalTotal;
443 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
444 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
445
446 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
447
448 if(eWindow == MAIN_WINDOW)
449 {
450 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
451 //u16VerticalTotal = ( MDrv_Read2Byte( L_BK_IP1F2(0x1f)) & MST_V_TOTAL_MASK );
452 u16VerticalTotal = ( SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK01_1F_L) & MST_V_TOTAL_MASK );
453 }
454 else
455 {
456 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
457 //u16VerticalTotal = ( MDrv_Read2Byte( L_BK_IP1F1(0x1f)) & MST_V_TOTAL_MASK );
458 u16VerticalTotal = ( SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK03_1F_L) & MST_V_TOTAL_MASK );
459 }
460
461 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
462
463 return u16VerticalTotal;
464 }
465 #if 0
466 /******************************************************************************/
467 /// Get the horizontal period of auto postion
468 /// @return the horizontal period of auto postion
469 /******************************************************************************/
470 MS_U16 MDrv_Scaler_GetHorizontalDEStart(void)
471 {
472 MS_U8 u8Bank;
473 MS_U16 u16HorizontalDE;
474
475 u8Bank = MDrv_ReadByte ( BK_SELECT_00 );
476 MDrv_WriteByte ( BK_SELECT_00, REG_BANK_IP1F2 );
477
478 u16HorizontalDE = MDrv_Read2Byte ( L_BK_IP1F2 ( 0x13 ) );
479
480 MDrv_WriteByte ( BK_SELECT_00, u8Bank );
481
482 return u16HorizontalDE;
483 }
484
485
486 /******************************************************************************/
487 /// Get the horizontal period of auto postion
488 /// @return the horizontal period of auto postion
489 /******************************************************************************/
490 MS_U16 MDrv_Scaler_GetHorizontalDE(void)
491 {
492 MS_U8 u8Bank;
493 MS_U16 u16HorizontalDE;
494
495 u8Bank = MDrv_ReadByte ( BK_SELECT_00 );
496 MDrv_WriteByte ( BK_SELECT_00, REG_BANK_IP1F2 );
497
498 u16HorizontalDE = MDrv_Read2Byte ( L_BK_IP1F2 ( 0x15 ) ) -
499 MDrv_Read2Byte ( L_BK_IP1F2 ( 0x13 ) ) + 1;
500
501 MDrv_WriteByte ( BK_SELECT_00, u8Bank );
502
503 return u16HorizontalDE;
504 }
505
506
507 /******************************************************************************/
508 /// Get the vertical period of auto postion
509 /// @return the vertical period of auto postion
510 /******************************************************************************/
511 MS_U16 MDrv_Scaler_GetVerticalDEStart(void)
512 {
513 MS_U8 u8Bank;
514 MS_U16 u16VerticalDE;
515
516 u8Bank = MDrv_ReadByte ( BK_SELECT_00 );
517 MDrv_WriteByte ( BK_SELECT_00, REG_BANK_IP1F2 );
518
519 u16VerticalDE = MDrv_Read2Byte ( L_BK_IP1F2 ( 0x12 ) );
520
521 MDrv_WriteByte ( BK_SELECT_00, u8Bank );
522
523 return u16VerticalDE;
524 }
525
526 /******************************************************************************/
527 /// Get the vertical period of auto postion
528 /// @return the vertical period of auto postion
529 /******************************************************************************/
530 MS_U16 MDrv_Scaler_GetVerticalDEEnd(void)
531 {
532 MS_U8 u8Bank;
533 MS_U16 u16VerticalDE;
534
535 u8Bank = MDrv_ReadByte ( BK_SELECT_00 );
536 MDrv_WriteByte ( BK_SELECT_00, REG_BANK_IP1F2 );
537
538 u16VerticalDE = MDrv_Read2Byte ( L_BK_IP1F2 ( 0x14 ) );
539
540 MDrv_WriteByte ( BK_SELECT_00, u8Bank );
541
542 return u16VerticalDE;
543 }
544
545
546 /******************************************************************************/
547 /// Get the vertical period of auto postion
548 /// @return the vertical period of auto postion
549 /******************************************************************************/
550 MS_U16 MDrv_Scaler_GetVerticalDE(void)
551 {
552 MS_U8 u8Bank;
553 MS_U16 u16VerticalDE;
554
555 u8Bank = MDrv_ReadByte ( BK_SELECT_00 );
556 MDrv_WriteByte ( BK_SELECT_00, REG_BANK_IP1F2 );
557
558 u16VerticalDE = MDrv_Read2Byte ( L_BK_IP1F2 ( 0x14 ) ) -
559 MDrv_Read2Byte ( L_BK_IP1F2 ( 0x12 ) ) + 1;
560
561 // SC_PATCH_02 start ===============================
562 // 2008-07-24.Daniel: Patch Interlace mode
563 if( Hal_SC_ip_get_interlace_status() )
564 {
565 if( u16VerticalDE&1 )
566 u16VerticalDE += 1;
567 }
568 // SC_PATCH_02 end =================================
569
570 MDrv_WriteByte ( BK_SELECT_00, u8Bank );
571
572 return u16VerticalDE;
573 }
574 #endif
575 //=========================================================//
576 // Function : Hal_SC_ip_de_hstart_info
577 // Description:
578 //=========================================================//
Hal_SC_ip_de_hstart_info(void * pInstance,SCALER_WIN eWindow)579 MS_U16 Hal_SC_ip_de_hstart_info(void *pInstance, SCALER_WIN eWindow)
580 {
581 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
582 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
583 if(eWindow == MAIN_WINDOW)
584 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_13_L, IP_DE_HSTART_MASK);
585 else
586 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_13_L, IP_DE_HSTART_MASK);
587 }
588 //=========================================================//
589 // Function : Hal_SC_ip_de_hend_info
590 // Description:
591 //=========================================================//
Hal_SC_ip_de_hend_info(void * pInstance,SCALER_WIN eWindow)592 MS_U16 Hal_SC_ip_de_hend_info(void *pInstance, SCALER_WIN eWindow)
593 {
594 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
595 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
596 if(eWindow == MAIN_WINDOW)
597 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_15_L, IP_DE_HEND_MASK);
598 else
599 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_15_L, IP_DE_HEND_MASK);
600 }
601
602 //=========================================================//
603 // Function : Hal_SC_ip_de_vstart_info
604 // Description:
605 //=========================================================//
Hal_SC_ip_de_vstart_info(void * pInstance,SCALER_WIN eWindow)606 MS_U16 Hal_SC_ip_de_vstart_info(void *pInstance, SCALER_WIN eWindow)
607 {
608 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
609 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
610 if(eWindow == MAIN_WINDOW)
611 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_12_L, IP_DE_VSTART_MASK);
612 else
613 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_12_L, IP_DE_VSTART_MASK);
614 }
615 //=========================================================//
616 // Function : Hal_SC_ip_de_vend_info
617 // Description:
618 //=========================================================//
Hal_SC_ip_de_vend_info(void * pInstance,SCALER_WIN eWindow)619 MS_U16 Hal_SC_ip_de_vend_info(void *pInstance, SCALER_WIN eWindow)
620 {
621 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
622 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
623 if(eWindow == MAIN_WINDOW)
624 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_14_L, IP_DE_VEND_MASK);
625 else
626 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_14_L, IP_DE_VEND_MASK);
627 }
628
629 /******************************************************************************/
630 ///Set H position for PC mode
631 ///@param u16Position \b IN
632 ///- H position
633 /******************************************************************************/
Hal_SC_ip_set_pc_h_position(void * pInstance,MS_U16 u16Position,SCALER_WIN eWindow)634 void Hal_SC_ip_set_pc_h_position (void *pInstance, MS_U16 u16Position, SCALER_WIN eWindow)
635 {
636 //MS_U8 u8Bank;
637 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
638 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
639
640 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
641
642 if(eWindow == MAIN_WINDOW)
643 {
644 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
645 //MDrv_W=rite2Byte(L_BK_IP1F2(0x05), u16Position) ;
646 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_05_L, u16Position) ;
647 }
648 else
649 {
650 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
651 //MDrv_Write2Byte(L_BK_IP1F1(0x05), u16Position) ;
652 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_05_L, u16Position) ;
653 }
654
655 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
656 }
657
658
659 /******************************************************************************/
660 ///Set V position for PC mode
661 ///@param u16Position \b IN
662 ///- V position
663 /******************************************************************************/
Hal_SC_ip_set_pc_v_position(void * pInstance,MS_U16 u16Position,SCALER_WIN eWindow)664 void Hal_SC_ip_set_pc_v_position (void *pInstance, MS_U16 u16Position, SCALER_WIN eWindow )
665 {
666 //MS_U8 u8Bank;
667 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
668 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
669
670 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
671
672 u16Position = (u16Position==0)?1:u16Position;
673
674 if(eWindow == MAIN_WINDOW)
675 {
676 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
677 //MDrv_Write2Byte(L_BK_IP1F2(0x04), u16Position );
678 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_04_L, u16Position) ;
679 }
680 else
681 {
682 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
683 //MDrv_Write2Byte(L_BK_IP1F1(0x04), u16Position );
684 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_04_L, u16Position);
685 }
686
687 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
688 }
689
690 /******************************************************************************/
691 ///Set Macrovision filter
692 ///@param bEnable \b IN
693 ///- ENABLE Filter
694 /******************************************************************************/
Hal_SC_ip_set_ms_filter(void * pInstance,MS_BOOL bEnable,MS_U16 u16FilterRange,SCALER_WIN eWindow)695 void Hal_SC_ip_set_ms_filter(void *pInstance, MS_BOOL bEnable, MS_U16 u16FilterRange, SCALER_WIN eWindow )
696 {
697 //Macrovision filter is not used right now
698 UNUSED(u16FilterRange);
699 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
700 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
701
702 if ( bEnable )
703 {
704 if( eWindow == MAIN_WINDOW )
705 {
706 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_35_L, BIT(12) , BIT(12) | BIT(13) );
707 }
708 else
709 {
710 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_35_L, BIT(12) , BIT(12) | BIT(13) );
711 }
712 }
713 else
714 {
715 if( eWindow == MAIN_WINDOW )
716 {
717 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_35_L, 0x00 , BIT(12) | BIT(13) );
718 }
719 else
720 {
721 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_35_L, 0x00 , BIT(12) | BIT(13) );
722 }
723 }
724
725 }
726
727 /******************************************************************************/
728 ///Set coast window information.
729 ///@param u8Start \b IN
730 ///- Coast start from n HSYNC leading edge
731 ///@param u8End \n IN
732 ///- Coast end at n HSYNC leading edge
733 /******************************************************************************/
Hal_SC_ip_set_coast_window(void * pInstance,MS_U8 u8Start,MS_U8 u8End,SCALER_WIN eWindow)734 void Hal_SC_ip_set_coast_window(void *pInstance, MS_U8 u8Start, MS_U8 u8End, SCALER_WIN eWindow )
735 {
736 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
737 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
738 if( eWindow == MAIN_WINDOW )
739 {
740 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_24_L, u8Start<<8, 0xFF00 );
741 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_25_L, u8End, 0x00FF );
742 }
743 else
744 {
745 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_24_L, u8Start<<8, 0xFF00 );
746 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_25_L, u8End, 0x00FF );
747 }
748 }
749
750
Hal_SC_ip_sog_detect(void * pInstance)751 void Hal_SC_ip_sog_detect(void* pInstance)
752 {
753 MS_U8 u8SOGState;
754 MS_U8 u8SogDetectStatus;
755 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
756 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
757
758 u8SogDetectStatus = HAL_SC_GetSogDetectStatus(pInstance);
759
760 u8SogDetectStatus &= ~(0x0001);
761 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070;
762 // check Separated -> Composite -> SOG -> Separated
763 if(u8SOGState & BIT(4))
764 {
765 // in detecting SOG, turn SOG detect off and set back to auto-detect
766 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect
767 u8SOGState |= 0x00; // switch to detect separated H/V Sync
768 }
769 else if((u8SOGState & 0x60) == 0x40)
770 {
771 // detecting separated H/V sync, switch to detect composite sync
772 u8SOGState &= ~0x70;
773 u8SOGState |= 0x20; // switch to detect composite sync
774 }
775 else if((u8SOGState & 0x60) == 0x20)
776 {
777 // detecting composite sync, switch to detect SOG
778 u8SogDetectStatus |= (0x0001);
779 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on
780 }
781 else
782 {
783 // detecting separated H/V sync, switch to detect composite sync
784 u8SOGState &= ~0x70;
785 u8SOGState |= 0x40; // switch to detect composite sync
786 }
787
788 HAL_SC_SetSogDetectStatus(pInstance, u8SogDetectStatus);
789 //MDrv_WriteByte(L_BK_IP1F2(0x02), u8SOGState);
790 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L,u8SOGState,0x0070);
791 Hal_SC_ip_software_reset(pInstance, REST_IP_F2, MAIN_WINDOW);
792 Hal_ADC_reset(pInstance, REST_ADC);
793 // adjust ADC bandwidth
794 if((u8SOGState & 0x70) == 0x70)
795 {
796 // SOG
797 //MDrv_WriteRegBit(L_BK_IP1F2(0x03), DISABLE, BIT(5)); // Delay 1/4 input HSYNC
798 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, 0 ,BIT(5));
799 MDrv_WriteRegBit(REG_ADC_ATOP_1C_L, DISABLE, BIT(5));
800 MDrv_WriteByte(REG_ADC_ATOP_1C_H, 0x38); // Turn on SOG input low bandwidth filter
801 MDrv_WriteRegBit(REG_ADC_DTOP_07_L, ENABLE, BIT(6)); // ADC PLL lock source is SOG
802 }
803 else
804 {
805 // Non SOG
806 //MDrv_WriteRegBit(L_BK_IP1F2(0x03), DISABLE, BIT(5)); // No delay input HSYNC
807 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, 0 ,BIT(5));
808 MDrv_WriteRegBit(REG_ADC_ATOP_1C_L, ENABLE, BIT(5));
809 MDrv_WriteByte(REG_ADC_ATOP_1C_H, 0x30); // Turn off SOG input low bandwidth filter
810 MDrv_WriteRegBit(REG_ADC_DTOP_07_L, DISABLE, BIT(6)); // ADC PLL lock source is HSync
811 }
812 }
813
814 /******************************************************************************/
815 ///get interlace detecting result
816 ///@return MS_U8
817 ///- 1:interlace
818 ///- 0:no interlace
819 /******************************************************************************/
Hal_SC_ip_get_interlace_status(void * pInstance,SCALER_WIN eWindow)820 MS_U8 Hal_SC_ip_get_interlace_status (void *pInstance, SCALER_WIN eWindow )
821 {
822 //MS_U8 u8Bank;
823 MS_BOOL bInterlace;
824 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
825 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
826
827 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
828
829 bInterlace = 0;
830
831 if(eWindow == MAIN_WINDOW)
832 {
833 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
834 //if ( MDrv_ReadByte(H_BK_IP1F2(0x1E)) & BIT(3) )
835 if ( SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_1E_L) & BIT(11) )
836 {
837 bInterlace = 1;
838 }
839 }
840 else
841 {
842 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
843 //if ( MDrv_ReadByte(H_BK_IP1F1(0x1E)) & BIT(3) )
844 if ( SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_1E_L) & BIT(11) )
845 {
846 bInterlace = 1;
847 }
848 }
849
850
851 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
852 return bInterlace;
853 }
854
Hal_SC_IPMux_Gen_SpecificTiming(void * pInstance,XC_Internal_TimingType timingtype)855 void Hal_SC_IPMux_Gen_SpecificTiming(void *pInstance, XC_Internal_TimingType timingtype )
856 {
857 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
858 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
859
860 switch (timingtype)
861 {
862 case E_XC_480P:
863 case E_XC_480I:
864 W2BYTE(REG_IPMUX_12_L, 0x02D0); //HDE
865 W2BYTEMSK(REG_IPMUX_13_L, 010, LBMASK); //H front porch
866 W2BYTEMSK(REG_IPMUX_14_L, 0x3E, LBMASK) ; //H sync pulse width
867 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A
868 W2BYTE(REG_IPMUX_16_L, 0x01E0) ; //VDE
869 W2BYTEMSK(REG_IPMUX_17_L, 0x06, LBMASK) ; //V front porch
870 W2BYTEMSK(REG_IPMUX_18_L, 0x09, LBMASK) ; //V sync pulse width
871 W2BYTE(REG_IPMUX_19_L, 0x020d) ; //Vtotal
872 break;
873
874 case E_XC_576P:
875 case E_XC_576I:
876 W2BYTE(REG_IPMUX_12_L, 0x02D0); //HDE
877 W2BYTEMSK(REG_IPMUX_13_L, 010, LBMASK); //H front porch
878 W2BYTEMSK(REG_IPMUX_14_L, 0x3E, LBMASK) ; //H sync pulse width
879 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal
880 W2BYTE(REG_IPMUX_16_L, 0x0240) ; //VDE
881 W2BYTEMSK(REG_IPMUX_17_L, 0x06, LBMASK) ; //V front porch
882 W2BYTEMSK(REG_IPMUX_18_L, 0x09, LBMASK) ; //V sync pulse width
883 W2BYTE(REG_IPMUX_19_L, 0x0271) ; //Vtotal
884 break;
885
886 case E_XC_720P:
887 case E_XC_720I:
888 W2BYTE(REG_IPMUX_12_L, 0x0500); //HDE
889 W2BYTEMSK(REG_IPMUX_13_L, 0x6E, LBMASK); //H front porch
890 W2BYTEMSK(REG_IPMUX_14_L, 0x28, LBMASK) ; //H sync pulse width
891 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal
892 W2BYTE(REG_IPMUX_16_L, 0x02D0) ; //VDE
893 W2BYTEMSK(REG_IPMUX_17_L, 0x05, LBMASK) ; //V front porch
894 W2BYTEMSK(REG_IPMUX_18_L, 0x05, LBMASK) ; //V sync pulse width
895 W2BYTE(REG_IPMUX_19_L, 0x02EE) ; //Vtotal
896 break;
897
898 case E_XC_1080P:
899 case E_XC_1080I:
900
901 W2BYTE(REG_IPMUX_12_L, 0x0780); //HDE
902 W2BYTEMSK(REG_IPMUX_13_L, 0x58, LBMASK); //H front porch
903 W2BYTEMSK(REG_IPMUX_14_L, 0x2C, LBMASK) ; //H sync pulse width
904 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal
905 W2BYTE(REG_IPMUX_16_L, 0x0438) ; //VDE
906 W2BYTEMSK(REG_IPMUX_17_L, 0x02, LBMASK) ; //V front porch
907 W2BYTEMSK(REG_IPMUX_18_L, 0x05, LBMASK) ; //V sync pulse width
908 W2BYTE(REG_IPMUX_19_L, 0x0465) ; //Vtotal
909
910 break;
911 case E_XC_OFF:
912 default:
913 break;
914 }
915
916 if((timingtype == E_XC_480I) || (timingtype == E_XC_576I) || (timingtype == E_XC_720I) || (timingtype == E_XC_1080I))
917 {
918 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1));
919 }
920 else
921 {
922 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1));
923 }
924 if ( timingtype == E_XC_OFF)
925 {
926 // Turn off timing gen
927 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0));
928 }
929 else
930 {
931 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15));
932 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0));
933 }
934
935
936 }
937
Hal_SC_Check_IP_Gen_Timing(void * pInstance)938 MS_BOOL Hal_SC_Check_IP_Gen_Timing(void *pInstance)
939 {
940 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01);
941 }
942
Hal_SC_ip_set_input_source(void * pInstance,MS_U8 u8InputSrcSel,MS_U8 u8SyncSel,MS_U8 u8VideoSel,MS_U8 u8isYPbPr,SCALER_WIN eWindow)943 void Hal_SC_ip_set_input_source(void *pInstance, MS_U8 u8InputSrcSel, MS_U8 u8SyncSel, MS_U8 u8VideoSel, MS_U8 u8isYPbPr, SCALER_WIN eWindow )
944 {
945 MS_U16 u16RegVal;
946 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
947 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
948
949 u16RegVal = (u8InputSrcSel&0x07) |
950 ((u8SyncSel&0x07) << 4) |
951 ((u8VideoSel&0x03) << 8) |
952 ((u8isYPbPr&0x01) << 10);
953
954 if( eWindow == MAIN_WINDOW )
955 {
956 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_02_L, u16RegVal, 0x0777);
957 }
958 else
959 {
960 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_02_L, u16RegVal, 0x0777);
961 }
962
963 }
964
965
hal_ip_set_input_10bit(void * pInstance,MS_BOOL bInput10Bit,SCALER_WIN eWindow)966 void hal_ip_set_input_10bit(void *pInstance, MS_BOOL bInput10Bit, SCALER_WIN eWindow )
967 {
968 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
969 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
970 if( eWindow == MAIN_WINDOW )
971 {
972 if(bInput10Bit)
973 {
974 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, BIT(11), BIT(11));
975 }
976 else //Input is 8bit
977 {
978 //when BIT(11)=0 --> BIT(10)=1, 8bit.5; BIT(10)=0, 8bit.0
979 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, BIT(10), (BIT(11)|BIT(10)) );
980 }
981 }
982 else
983 {
984 if(bInput10Bit)
985 {
986 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_03_L, BIT(11), BIT(11));
987 }
988 else //Input is 8bit
989 {
990 //when BIT(11)=0 --> BIT(10)=1, 8bit.5; BIT(10)=0, 8bit.0
991 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_03_L, BIT(10), (BIT(11)|BIT(10)) );
992 }
993 }
994 }
995
996
Hal_SC_ip_set_image_wrap(void * pInstance,MS_BOOL bHEnable,MS_BOOL bVEnable,SCALER_WIN eWindow)997 void Hal_SC_ip_set_image_wrap(void *pInstance, MS_BOOL bHEnable, MS_BOOL bVEnable, SCALER_WIN eWindow )
998 {
999 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1000 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1001 if( eWindow == MAIN_WINDOW )
1002 {
1003 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, ((bVEnable<<1)|bHEnable), (BIT(1)|BIT(0)) );
1004 }
1005 else
1006 {
1007 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_03_L, ((bVEnable<<1)|bHEnable), (BIT(1)|BIT(0)) );
1008 }
1009 }
1010
1011
Hal_SC_ip_set_input_sync_reference_edge(void * pInstance,MS_BOOL bHRef,MS_BOOL bVRef,SCALER_WIN eWindow)1012 void Hal_SC_ip_set_input_sync_reference_edge(void *pInstance, MS_BOOL bHRef, MS_BOOL bVRef, SCALER_WIN eWindow )
1013 {
1014 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1015 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1016 if( eWindow == MAIN_WINDOW )
1017 {
1018 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, ((bHRef<<4)|(bVRef<<3)), (BIT(4)|BIT(3)) );
1019 }
1020 else
1021 {
1022 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_03_L, ((bHRef<<4)|(bVRef<<3)), (BIT(4)|BIT(3)) );
1023 }
1024 }
1025
1026
Hal_SC_ip_set_input_vsync_delay(void * pInstance,MS_BOOL bDelay,SCALER_WIN eWindow)1027 void Hal_SC_ip_set_input_vsync_delay(void *pInstance, MS_BOOL bDelay, SCALER_WIN eWindow )
1028 {
1029 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1030 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1031 if( eWindow == MAIN_WINDOW )
1032 {
1033 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, bDelay<<5, BIT(5) );
1034 }
1035 else
1036 {
1037 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_03_L, bDelay<<5, BIT(5) );
1038 }
1039 }
1040
1041
Hal_SC_ip_set_de_only_mode(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)1042 void Hal_SC_ip_set_de_only_mode(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow )
1043 {
1044 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1045 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1046 //Turn on BIT(7) to let H/V Start being programable.
1047 if( eWindow == MAIN_WINDOW )
1048 {
1049 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, (BIT(7)|(bEnable<<6)), (BIT(7)|BIT(6)) );
1050 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_2F_L, bEnable<<4, BIT(4) ); // SW patch for HDMI switch, Auto search HST jistter mask filter force off
1051 if(psXCInstPri->u32DeviceID)
1052 MDrv_WriteRegBit(REG_S2_DE_ONLY_F2, bEnable, S2_DE_ONLY_F2_MASK);
1053 else
1054 MDrv_WriteRegBit(REG_DE_ONLY_F2, bEnable, DE_ONLY_F2_MASK);
1055 }
1056 else
1057 {
1058 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_03_L, (BIT(7)|(bEnable<<6)), (BIT(7)|BIT(6)) );
1059 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_2F_L, bEnable<<4, BIT(4) ); // SW patch for HDMI switch, Auto search HST jistter mask filter force off
1060 if(psXCInstPri->u32DeviceID)
1061 MDrv_WriteRegBit(REG_S2_DE_ONLY_F1, bEnable, S2_DE_ONLY_F1_MASK);
1062 else
1063 MDrv_WriteRegBit(REG_DE_ONLY_F1, bEnable, DE_ONLY_F1_MASK);
1064 }
1065 }
1066
Hal_SC_ip_set_coast_input(void * pInstance,MS_BOOL bInputSel,SCALER_WIN eWindow)1067 void Hal_SC_ip_set_coast_input(void *pInstance, MS_BOOL bInputSel, SCALER_WIN eWindow )
1068 {
1069 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1070 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1071 //BIT(0): Coast Polarity to PAD --TODO
1072 if( eWindow == MAIN_WINDOW )
1073 {
1074 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_24_L, ((bInputSel<<5)|BIT(0)), 0xFF );
1075 }
1076 else
1077 {
1078 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_24_L, ((bInputSel<<5)|BIT(0)), 0xFF );
1079 }
1080 }
1081
Hal_SC_ip_set_DE_Mode_Glitch(void * pInstance,MS_U8 u8Setting,SCALER_WIN eWindow)1082 void Hal_SC_ip_set_DE_Mode_Glitch(void *pInstance, MS_U8 u8Setting , SCALER_WIN eWindow )
1083 {
1084 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1085 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1086 if( eWindow == MAIN_WINDOW )
1087 {
1088 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_27_L, u8Setting, 0xFF );
1089 }
1090 else
1091 {
1092 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF );
1093 }
1094 }
1095
Hal_SC_ip_get_DE_mode_glitch_protect_enabled(void * pInstance,SCALER_WIN eWindow)1096 MS_BOOL Hal_SC_ip_get_DE_mode_glitch_protect_enabled(void *pInstance, SCALER_WIN eWindow)
1097 {
1098 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1099 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1100 if(eWindow == MAIN_WINDOW)
1101 {
1102 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_27_L, BIT(2)) >> 2);
1103 }
1104 else
1105 {
1106 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2);
1107 }
1108 }
1109
Hal_SC_ip_set_input_sync_sample_mode(void * pInstance,MS_BOOL bMode,SCALER_WIN eWindow)1110 void Hal_SC_ip_set_input_sync_sample_mode(void *pInstance, MS_BOOL bMode, SCALER_WIN eWindow )
1111 {
1112 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1113 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1114 if( eWindow == MAIN_WINDOW )
1115 {
1116 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) );
1117 }
1118 else
1119 {
1120 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, (bMode<<2), BIT(2) );
1121 }
1122 }
1123
Hal_SC_ip_set_de_bypass_mode(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)1124 void Hal_SC_ip_set_de_bypass_mode(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow )
1125 {
1126 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1127 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1128 if( eWindow == MAIN_WINDOW )
1129 {
1130 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_2F_L, (bEnable<<15), BIT(15) );
1131 }
1132 else
1133 {
1134 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_2F_L, (bEnable<<15), BIT(15) );
1135 }
1136 }
1137
Hal_SC_ip_set_de_lock_mode(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)1138 void Hal_SC_ip_set_de_lock_mode(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow )
1139 {
1140 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1141 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1142
1143 MS_BOOL bLastLockMode = FALSE;
1144
1145 if( eWindow == MAIN_WINDOW )
1146 {
1147
1148 if(SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_1D_L, BIT(6) ))
1149 {
1150 bLastLockMode = TRUE;
1151 }
1152
1153 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_1D_L, (bEnable<<6), BIT(6) );
1154
1155 if(bLastLockMode != bEnable)
1156 {
1157 //change mode, then sw reset
1158 Hal_SC_ip_software_reset(pInstance, REST_IP_F2, MAIN_WINDOW);
1159 }
1160
1161 }
1162 else
1163 {
1164 if(SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_1D_L, BIT(6) ))
1165 {
1166 bLastLockMode = TRUE;
1167 }
1168
1169 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_1D_L, (bEnable<<6), BIT(6) );
1170
1171 if(bLastLockMode != bEnable)
1172 {
1173 //change mode, then sw reset
1174 Hal_SC_ip_software_reset(pInstance, REST_IP_F1, MAIN_WINDOW);
1175 }
1176
1177 }
1178 }
1179
Hal_SC_get_hsd_pixel_count(void * pInstance,SCALER_WIN eWindow)1180 MS_U16 Hal_SC_get_hsd_pixel_count(void *pInstance, SCALER_WIN eWindow )
1181 {
1182 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1183 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1184 if( eWindow == MAIN_WINDOW )
1185 {
1186 return SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK02_3E_L, BITMASK(11 : 0) );
1187 }
1188 else
1189 {
1190 return SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK04_3E_L, BITMASK(11 : 0) );
1191 }
1192 }
1193
Hal_SC_get_vsd_line_count(void * pInstance,SCALER_WIN eWindow)1194 MS_U16 Hal_SC_get_vsd_line_count(void *pInstance, SCALER_WIN eWindow )
1195 {
1196 MS_U16 u16Count;
1197 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1198 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1199 if( eWindow == MAIN_WINDOW )
1200 {
1201 u16Count = SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK02_3F_L, BITMASK(10 : 0) );
1202 }
1203 else
1204 {
1205 u16Count = SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK04_3F_L, BITMASK(10 : 0) );
1206 }
1207 if(MDrv_XC_PCMonitor_Get_Vtotal(pInstance, eWindow) > DOUBLEHD_1080X2P_VSIZE)
1208 {
1209 u16Count |= 0x800; //Complement for HW bits missing
1210 }
1211 return u16Count;
1212 }
1213
Hal_SC_ip_set_post_glitch_removal(void * pInstance,MS_BOOL bEnble,MS_U8 u8Range,SCALER_WIN eWindow)1214 void Hal_SC_ip_set_post_glitch_removal(void *pInstance, MS_BOOL bEnble, MS_U8 u8Range, SCALER_WIN eWindow )
1215 {
1216 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1217 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1218 if( eWindow == MAIN_WINDOW )
1219 {
1220 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 );
1221 }
1222 else
1223 {
1224 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 );
1225 }
1226 }
1227
Hal_SC_ip_get_post_glitch_removal(void * pInstance,SCALER_WIN eWindow)1228 MS_U8 Hal_SC_ip_get_post_glitch_removal(void *pInstance, SCALER_WIN eWindow)
1229 {
1230 MS_BOOL bEnable = FALSE;
1231 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1232 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1233
1234 if( eWindow == MAIN_WINDOW )
1235 {
1236 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7);
1237 if (bEnable)
1238 {
1239 return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4);
1240 }
1241 else
1242 {
1243 return 0;
1244 }
1245 }
1246 else
1247 {
1248 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, BIT(7)) >> 7);
1249 if (bEnable)
1250 {
1251 return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4);
1252 }
1253 else
1254 {
1255 return 0;
1256 }
1257 }
1258 }
1259
1260 //////////////////////////////////
1261 // Capture window
Hal_SC_ip_get_capture_window(void * pInstance,MS_WINDOW_TYPE * capture_win,SCALER_WIN eWindow)1262 void Hal_SC_ip_get_capture_window(void *pInstance, MS_WINDOW_TYPE* capture_win,SCALER_WIN eWindow)
1263 {
1264
1265 //MS_U8 u8Bank;
1266 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1267 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1268
1269 //u8Bank = MDrv_ReadByte(BK_SELECT_00);
1270
1271 if( eWindow == MAIN_WINDOW )
1272 {
1273 // MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F2);
1274
1275 /*capture_win->y = MDrv_Read2Byte( L_BK_IP1F2(0x04) ) ; // Vstart
1276 capture_win->x = MDrv_Read2Byte( L_BK_IP1F2(0x05) ) ; // Hstart
1277 capture_win->height= MDrv_Read2Byte( L_BK_IP1F2(0x06) ) ; // Vsize
1278 capture_win->width= MDrv_Read2Byte( L_BK_IP1F2(0x07) ) ; // Hsize
1279 */
1280 capture_win->y = SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK01_04_L ) ; // Vstart
1281 capture_win->x = SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK01_05_L ) ; // Hstart
1282 capture_win->height= SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK01_06_L ) ; // Vsize
1283 capture_win->width= SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_07_L , 0x3FFF) ; // Hsize
1284 }
1285 else
1286 {
1287 //MDrv_WriteByte(BK_SELECT_00, REG_BANK_IP1F1);
1288
1289 capture_win->y = SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK03_04_L ) ; // Vstart
1290 capture_win->x = SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK03_05_L ) ; // Hstart
1291 capture_win->height= SC_R2BYTE( psXCInstPri->u32DeviceID, REG_SC_BK03_06_L ) ; // Vsize
1292 capture_win->width= SC_R2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_07_L, 0x3FFF ) ; // Hsize
1293 }
1294
1295 //MDrv_WriteByte(BK_SELECT_00, u8Bank);
1296 }
1297
1298 #if 0
1299 static void Hal_SC_ip_set_capture_window(MS_U32 u32Reg, MS_U16 u16Value , SCALER_WIN eWindow)
1300 {
1301 if( eWindow == MAIN_WINDOW )
1302 {
1303 // There are 11bits for each setting of capture window
1304 SC_W2BYTEMSK( u32Reg , u16Value , 0x07FF );
1305 }
1306 else
1307 {
1308 MS_ASSERT(0);
1309 }
1310 }
1311 #endif
1312
Hal_SC_ip_set_capture_v_start(void * pInstance,MS_U16 u16Vstart,SCALER_WIN eWindow)1313 void Hal_SC_ip_set_capture_v_start(void *pInstance, MS_U16 u16Vstart , SCALER_WIN eWindow)
1314 {
1315 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1316 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1317 if(eWindow == MAIN_WINDOW)
1318 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_04_L, u16Vstart, 0x1FFF);
1319 else
1320 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_04_L, u16Vstart, 0x1FFF);
1321 }
1322
Hal_SC_ip_set_capture_v_start_with_Menuload(void * pInstance,MS_U16 u16Vstart,SCALER_WIN eWindow)1323 void Hal_SC_ip_set_capture_v_start_with_Menuload(void *pInstance, MS_U16 u16Vstart , SCALER_WIN eWindow)
1324 {
1325 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1326 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1327
1328 if(MDrv_XC_MLoad_GetStatus(pInstance) == E_MLOAD_ENABLED)
1329 {
1330 _MLOAD_ENTRY(pInstance);
1331
1332 if(eWindow == MAIN_WINDOW)
1333 {
1334 MDrv_XC_MLoad_set_trigger_sync(pInstance, MLOAD_TRIGGER_BY_IP_MAIN_SYNC);
1335 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK01_04_L, u16Vstart, 0x1FFF);
1336 }
1337 else
1338 {
1339 MDrv_XC_MLoad_set_trigger_sync(pInstance, MLOAD_TRIGGER_BY_IP_SUB_SYNC);
1340 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK03_04_L, u16Vstart, 0x1FFF);
1341 }
1342 if (!MDrv_XC_MLoad_Fire(pInstance, TRUE))
1343 {
1344 printf("Error: Set MLoad Fire Error!!!!\n ");
1345 }
1346 MDrv_XC_MLoad_set_trigger_sync(pInstance, MLOAD_TRIGGER_BY_OP_SYNC);
1347
1348 _MLOAD_RETURN(pInstance);
1349 }
1350 else
1351 {
1352 if(eWindow == MAIN_WINDOW)
1353 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_04_L, u16Vstart, 0x1FFF);
1354 else
1355 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_04_L, u16Vstart, 0x1FFF);
1356 }
1357 }
1358
Hal_SC_ip_set_capture_h_start(void * pInstance,MS_U16 u16Hstart,SCALER_WIN eWindow)1359 void Hal_SC_ip_set_capture_h_start(void *pInstance, MS_U16 u16Hstart , SCALER_WIN eWindow)
1360 {
1361 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1362 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1363 if(eWindow == MAIN_WINDOW)
1364 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_05_L, u16Hstart, 0x1FFF);
1365 else
1366 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_05_L, u16Hstart, 0x1FFF);
1367 }
1368
Hal_SC_ip_set_capture_h_start_with_Menuload(void * pInstance,MS_U16 u16Hstart,SCALER_WIN eWindow)1369 void Hal_SC_ip_set_capture_h_start_with_Menuload(void *pInstance, MS_U16 u16Hstart , SCALER_WIN eWindow)
1370 {
1371 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1372 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1373
1374 if(MDrv_XC_MLoad_GetStatus(pInstance) == E_MLOAD_ENABLED)
1375 {
1376 _MLOAD_ENTRY(pInstance);
1377
1378 if(eWindow == MAIN_WINDOW)
1379 {
1380 MDrv_XC_MLoad_set_trigger_sync(pInstance, MLOAD_TRIGGER_BY_IP_MAIN_SYNC);
1381 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK01_05_L, u16Hstart, 0x1FFF);
1382 }
1383 else
1384 {
1385 MDrv_XC_MLoad_set_trigger_sync(pInstance, MLOAD_TRIGGER_BY_IP_SUB_SYNC);
1386 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK03_05_L, u16Hstart, 0x1FFF);
1387 }
1388 if (!MDrv_XC_MLoad_Fire(pInstance, TRUE))
1389 {
1390 printf("Error: Set MLoad Fire Error!!!!\n ");
1391 }
1392 MDrv_XC_MLoad_set_trigger_sync(pInstance, MLOAD_TRIGGER_BY_OP_SYNC);
1393
1394 _MLOAD_RETURN(pInstance);
1395 }
1396 else
1397 {
1398 if(eWindow == MAIN_WINDOW)
1399 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_05_L, u16Hstart, 0x1FFF);
1400 else
1401 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_05_L, u16Hstart, 0x1FFF);
1402 }
1403 }
1404
Hal_SC_ip_set_capture_v_size(void * pInstance,MS_U16 u16Vsize,SCALER_WIN eWindow)1405 void Hal_SC_ip_set_capture_v_size(void *pInstance, MS_U16 u16Vsize , SCALER_WIN eWindow)
1406 {
1407 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1408 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1409 if(eWindow == MAIN_WINDOW)
1410 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_06_L, u16Vsize, 0x1FFF);
1411 else
1412 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_06_L, u16Vsize, 0x1FFF);
1413 }
1414
Hal_SC_ip_set_capture_h_size(void * pInstance,MS_U16 u16Hsize,SCALER_WIN eWindow)1415 void Hal_SC_ip_set_capture_h_size(void *pInstance, MS_U16 u16Hsize , SCALER_WIN eWindow)
1416 {
1417 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1418 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1419 if(eWindow == MAIN_WINDOW)
1420 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_07_L, u16Hsize, 0x3FFF);
1421 else
1422 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_07_L, u16Hsize, 0x3FFF);
1423 }
1424
Hal_SC_ip_set_fir_down_sample_divider(void * pInstance,MS_U8 u8Enable,MS_U16 u16OverSampleCount,SCALER_WIN eWindow)1425 void Hal_SC_ip_set_fir_down_sample_divider(void *pInstance, MS_U8 u8Enable, MS_U16 u16OverSampleCount,SCALER_WIN eWindow)
1426 {
1427 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1428 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1429 if( eWindow == MAIN_WINDOW )
1430 {
1431 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_0D_L, (u8Enable?( BIT(7) | (u16OverSampleCount & 0xF ) ):0) , (BIT(7) | BIT(0) |BIT(1) | BIT(2) |BIT(3)) );
1432 }
1433 else
1434 {
1435 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_0D_L, (u8Enable?( BIT(7) | (u16OverSampleCount & 0xF ) ):0) , (BIT(7) | BIT(0) |BIT(1) | BIT(2) |BIT(3)) );
1436 }
1437 }
1438
Hal_XC_MApi_XC_IPAutoNoSignal_GetCaps(void)1439 MS_BOOL Hal_XC_MApi_XC_IPAutoNoSignal_GetCaps(void)
1440 {
1441 return TRUE;
1442 }
1443
Hal_SC_ip_set_IPAutoNoSignal(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)1444 void Hal_SC_ip_set_IPAutoNoSignal(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow )
1445 {
1446 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1447 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1448 if (eWindow == MAIN_WINDOW)
1449 {
1450 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0B_L, bEnable? BIT(5):0, BIT(5));
1451 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_1D_L, bEnable? BIT(12):0, BIT(12));
1452 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_23_L, bEnable? BIT(14):0, BIT(14));
1453 }
1454 else
1455 {
1456 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_0B_L, bEnable? BIT(5):0, BIT(5));
1457 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_1D_L, bEnable? BIT(12):0, BIT(12));
1458 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_23_L, bEnable? BIT(13):0, BIT(13));
1459 }
1460 }
1461
Hal_SC_ip_get_IPAutoNoSignal(void * pInstance,SCALER_WIN eWindow)1462 MS_BOOL Hal_SC_ip_get_IPAutoNoSignal(void *pInstance, SCALER_WIN eWindow )
1463 {
1464 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1465 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1466 if (eWindow == MAIN_WINDOW)
1467 {
1468 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_1D_L, BIT(12) ) )? TRUE:FALSE;
1469 }
1470 else
1471 {
1472 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_1D_L, BIT(12) ) )? TRUE:FALSE;
1473 }
1474 }
1475
Hal_SC_ip_enable_turnoff_OP1_for_AutoNoSignal(void * pInstance,MS_BOOL bEnable)1476 void Hal_SC_ip_enable_turnoff_OP1_for_AutoNoSignal(void *pInstance, MS_BOOL bEnable)
1477 {
1478 SC_W2BYTEMSK(0, REG_SC_BK20_24_L, bEnable? BIT(10):0, BIT(10));
1479 }
1480
1481 //////////////////////////////////
1482 // Auto gain
Hal_SC_ip_set_auto_gain_function(void * pInstance,MS_U8 u8Enable,SCALER_WIN eWindow)1483 void Hal_SC_ip_set_auto_gain_function(void *pInstance, MS_U8 u8Enable, SCALER_WIN eWindow)
1484 {
1485 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1486 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1487 if( eWindow == MAIN_WINDOW )
1488 {
1489 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_0E_L, (u8Enable?(BIT(0) | BIT(4)):0) , (BIT(0) | BIT(4)) );
1490 }
1491 else
1492 {
1493 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_0E_L, (u8Enable?(BIT(0) | BIT(4)):0) , (BIT(0) | BIT(4)) );
1494 }
1495 }
1496
Hal_SC_ip_is_auto_gain_result_ready(void * pInstance,SCALER_WIN eWindow)1497 MS_BOOL Hal_SC_ip_is_auto_gain_result_ready(void *pInstance, SCALER_WIN eWindow)
1498 {
1499 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1500 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1501 if( eWindow == MAIN_WINDOW )
1502 {
1503 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0E_L, BIT(1) ) )? TRUE:FALSE;
1504 }
1505 else
1506 {
1507 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_0E_L, BIT(1) ) )? TRUE:FALSE;
1508 }
1509 }
1510
1511 // bit 0 : B min
1512 // bit 1 : G min
1513 // bit 2 : R min
Hal_SC_ip_auto_gain_min_value_status(void * pInstance,SCALER_WIN eWindow)1514 MS_U8 Hal_SC_ip_auto_gain_min_value_status(void *pInstance, SCALER_WIN eWindow)
1515 {
1516 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1517 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1518 if( eWindow == MAIN_WINDOW )
1519 {
1520 return ( (SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0E_L, ( BIT(10) | BIT(9) | BIT(8) ) ) ) >> 8 );
1521 }
1522 else
1523 {
1524 return ( (SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_0E_L, ( BIT(10) | BIT(9) | BIT(8) ) ) ) >> 8 );
1525 }
1526 }
1527
1528 // Make sure
1529 // bit 0 : B max
1530 // bit 1 : G max
1531 // bit 2 : R max
Hal_SC_ip_auto_gain_max_value_status(void * pInstance,SCALER_WIN eWindow)1532 MS_U8 Hal_SC_ip_auto_gain_max_value_status(void *pInstance, SCALER_WIN eWindow)
1533 {
1534 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1535 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1536 if( eWindow == MAIN_WINDOW )
1537 {
1538 return ( (SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0E_L, ( BIT(5) | BIT(6) | BIT(7) ) ) ) >> 5 );
1539 }
1540 else
1541 {
1542 return ( (SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_0E_L, ( BIT(5) | BIT(6) | BIT(7) ) ) ) >> 5 );
1543 }
1544 }
1545
1546 //////////////////////////////////
1547 // Auto phase
Hal_SC_ip_get_auto_phase_value(void * pInstance,SCALER_WIN eWindow)1548 MS_U32 Hal_SC_ip_get_auto_phase_value(void *pInstance, SCALER_WIN eWindow)
1549 {
1550 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1551 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1552 if( eWindow == MAIN_WINDOW )
1553 {
1554 return ( SC_R4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_1A_L) );
1555 }
1556 else
1557 {
1558 return ( SC_R4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_1A_L) );
1559 }
1560 }
1561
Hal_SC_ip_is_auto_phase_result_ready(void * pInstance,SCALER_WIN eWindow)1562 MS_BOOL Hal_SC_ip_is_auto_phase_result_ready(void *pInstance, SCALER_WIN eWindow)
1563 {
1564 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1565 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1566 if( eWindow == MAIN_WINDOW )
1567 {
1568 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_19_L, BIT(1) ) )? TRUE:FALSE;
1569 }
1570 else
1571 {
1572 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_19_L, BIT(1) ) )? TRUE:FALSE;
1573 }
1574 }
1575
1576 //////////////////////////////////
1577 // Auto position
Hal_SC_ip_is_auto_position_result_ready(void * pInstance,SCALER_WIN eWindow)1578 MS_BOOL Hal_SC_ip_is_auto_position_result_ready(void *pInstance, SCALER_WIN eWindow)
1579 {
1580 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1581 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1582 if( eWindow == MAIN_WINDOW )
1583 {
1584 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_10_L, BIT(1) ) )? TRUE:FALSE;
1585 }
1586 else
1587 {
1588 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE;
1589 }
1590 }
Hal_SC_ip_set_auto_position_function(void * pInstance,MS_U8 u8Enable,SCALER_WIN eWindow)1591 void Hal_SC_ip_set_auto_position_function(void *pInstance, MS_U8 u8Enable, SCALER_WIN eWindow)
1592 {
1593 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1594 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1595 if( eWindow == MAIN_WINDOW )
1596 {
1597 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_10_L, (u8Enable?BIT(0):0) , BIT(0) );
1598 }
1599 else
1600 {
1601 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) );
1602 }
1603 }
1604
1605 // Threshold is from 2'b0000 ~ 2'b1111
Hal_SC_ip_set_valid_data_threshold(void * pInstance,MS_U8 u8Threshold,SCALER_WIN eWindow)1606 void Hal_SC_ip_set_valid_data_threshold(void *pInstance, MS_U8 u8Threshold, SCALER_WIN eWindow )
1607 {
1608 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1609 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1610 if( eWindow == MAIN_WINDOW )
1611 {
1612 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 );
1613 }
1614 else
1615 {
1616 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 );
1617 }
1618 }
1619
1620 #if 0
1621 static MS_U16 Hal_SC_ip_get_auto_position(MS_U32 u32Reg, SCALER_WIN eWindow)
1622 {
1623 if( eWindow == MAIN_WINDOW )
1624 {
1625 return ( SC_R2BYTE(u32Reg) & 0xFFF );
1626 }
1627 else
1628 {
1629 MS_ASSERT(0);
1630 return 0;
1631 }
1632 }
1633 #endif
1634
Hal_SC_ip_get_auto_position_v_start(void * pInstance,SCALER_WIN eWindow)1635 MS_U16 Hal_SC_ip_get_auto_position_v_start(void *pInstance, SCALER_WIN eWindow )
1636 {
1637 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1638 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1639 if(eWindow == MAIN_WINDOW)
1640 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_12_L) & 0xFFF);
1641 else
1642 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_12_L) & 0xFFF);
1643 }
1644
Hal_SC_ip_get_auto_position_h_start(void * pInstance,SCALER_WIN eWindow)1645 MS_U16 Hal_SC_ip_get_auto_position_h_start(void *pInstance, SCALER_WIN eWindow )
1646 {
1647 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1648 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1649 if(eWindow == MAIN_WINDOW)
1650 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_13_L) & 0xFFF);
1651 else
1652 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_13_L) & 0xFFF);
1653 }
1654
Hal_SC_ip_get_auto_position_v_end(void * pInstance,SCALER_WIN eWindow)1655 MS_U16 Hal_SC_ip_get_auto_position_v_end(void *pInstance, SCALER_WIN eWindow )
1656 {
1657 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1658 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1659 if(eWindow == MAIN_WINDOW)
1660 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_14_L) & 0xFFF);
1661 else
1662 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_14_L) & 0xFFF);
1663 }
1664
Hal_SC_ip_get_auto_position_h_end(void * pInstance,SCALER_WIN eWindow)1665 MS_U16 Hal_SC_ip_get_auto_position_h_end(void *pInstance, SCALER_WIN eWindow )
1666 {
1667 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1668 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1669 if(eWindow == MAIN_WINDOW)
1670 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_15_L) & 0xFFF);
1671 else
1672 return (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_15_L) & 0xFFF);
1673 }
1674
1675 //////////////////////////////////
1676 // Auto range
Hal_SC_ip_set_auto_range_function(void * pInstance,MS_U8 u8Enable,SCALER_WIN eWindow)1677 void Hal_SC_ip_set_auto_range_function(void *pInstance, MS_U8 u8Enable, SCALER_WIN eWindow )
1678 {
1679 #if 0
1680 if (u8Enable)
1681 {
1682 // Debug mode.
1683 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_60_L, 0xFF00 , 0xFF00); // Bit(15) is enable.
1684 }
1685 else
1686 {
1687 // Debug mode.
1688 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_60_L, 0x0000 , 0xFF00); // Bit(15) is enable.
1689 }
1690 #endif
1691 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1692 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1693
1694 if(eWindow == MAIN_WINDOW)
1695 {
1696 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_29_L, (u8Enable?BIT(8):0) , BIT(8) );
1697 }
1698 else
1699 {
1700 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_29_L, (u8Enable?BIT(8):0) , BIT(8) );
1701 }
1702 }
1703
Hal_SC_ip_set_auto_range_window(void * pInstance,MS_U16 u16Vstart,MS_U16 u16Hstart,MS_U16 u16Vsize,MS_U16 u16Hsize,SCALER_WIN eWindow)1704 void Hal_SC_ip_set_auto_range_window(void *pInstance, MS_U16 u16Vstart, MS_U16 u16Hstart, MS_U16 u16Vsize , MS_U16 u16Hsize, SCALER_WIN eWindow)
1705 {
1706 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1707 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1708 if( eWindow == MAIN_WINDOW )
1709 {
1710 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_2A_L, u16Vstart ); //vstart
1711 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_2B_L, u16Hstart ); //hstart
1712 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_2C_L, u16Vsize ); //vsize
1713 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_2D_L, u16Hsize ); //hsize
1714 }
1715 else
1716 {
1717 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_2A_L, u16Vstart ); //vstart
1718 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_2B_L, u16Hstart ); //hstart
1719 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_2C_L, u16Vsize ); //vsize
1720 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_2D_L, u16Hsize ); //hsize
1721 }
1722
1723 }
1724
HAL_SC_ip_get_ipmux(void * pInstance)1725 MS_U8 HAL_SC_ip_get_ipmux(void *pInstance)
1726 {
1727 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1728 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1729 return (MS_U8)MDrv_ReadByte(REG_IPMUX_01_L)&0xF0;
1730 }
HAL_SC_ip_set_ipmux(void * pInstance,MS_U8 u8Val)1731 void HAL_SC_ip_set_ipmux(void *pInstance, MS_U8 u8Val)
1732 {
1733 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1734 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1735 MDrv_WriteByteMask(REG_IPMUX_01_L, u8Val,0x00F0);
1736 }
1737
HAL_SC_ip_get_ipclk(void * pInstance)1738 MS_U8 HAL_SC_ip_get_ipclk(void *pInstance)
1739 {
1740 return (MS_U8)MDrv_ReadByte(0x1E3F)&0x3F;
1741 }
1742
HAL_SC_ip_set_ipclk(void * pInstance,MS_U8 u8Val)1743 void HAL_SC_ip_set_ipclk(void *pInstance, MS_U8 u8Val)
1744 {
1745 MDrv_WriteByteMask(0x1E3F, u8Val, 0x3F); // 1E1F[13:8]
1746 }
1747
HAL_SC_ip_get_capturesource(void * pInstance)1748 MS_U8 HAL_SC_ip_get_capturesource(void *pInstance)
1749 {
1750 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1751 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1752 return (MS_U8)SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L, 0x0007);
1753 }
1754
HAL_SC_ip_set_capturesource(void * pInstance,MS_U8 u8Val)1755 void HAL_SC_ip_set_capturesource(void *pInstance, MS_U8 u8Val)
1756 {
1757 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1758 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1759 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L, (MS_U16)u8Val, 0x0007);
1760 }
1761
Hal_SC_ip_get_user_def_interlace_status(void * pInstance)1762 MS_U8 Hal_SC_ip_get_user_def_interlace_status(void *pInstance)
1763 {
1764 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1765 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1766 return (MS_U8)SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_21_L, 0x0003);
1767 }
Hal_SC_ip_set_user_def_interlace_status(void * pInstance,MS_BOOL bEnable,MS_BOOL bIsInterlace,SCALER_WIN eWindow)1768 void Hal_SC_ip_set_user_def_interlace_status(void *pInstance, MS_BOOL bEnable, MS_BOOL bIsInterlace,SCALER_WIN eWindow)
1769 {
1770 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1771 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1772 if(eWindow == MAIN_WINDOW)
1773 {
1774 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_21_L, (bEnable?BIT(0):0),BIT(0));
1775 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_21_L, (bIsInterlace?BIT(1):0),BIT(1));
1776 }
1777 else if(eWindow == SUB_WINDOW)
1778 {
1779 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0));
1780 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1));
1781 }
1782 }
1783
HAL_SC_ip_get_capture_method(void * pInstance)1784 MS_U8 HAL_SC_ip_get_capture_method(void *pInstance)
1785 {
1786 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1787 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1788 return (MS_U8)SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_03_L, 0x00FF);
1789 }
1790
HAL_SC_ip_get_capture_format(void * pInstance)1791 MS_BOOL HAL_SC_ip_get_capture_format(void *pInstance)
1792 {
1793 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1794 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1795 MS_BOOL bIsRGBfmt;
1796 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L, 0x0008))
1797 bIsRGBfmt = TRUE;
1798 else
1799 bIsRGBfmt = FALSE;
1800
1801 return bIsRGBfmt;
1802 }
1803
HAL_SC_ip_set_capture_format(void * pInstance,MS_BOOL bIsRGB)1804 void HAL_SC_ip_set_capture_format(void *pInstance, MS_BOOL bIsRGB)
1805 {
1806 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1807 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1808 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L, (bIsRGB?BIT(3):0), 0x0008);
1809 }
1810
HAL_SC_ip_get_h_predown_info(void * pInstance)1811 MS_BOOL HAL_SC_ip_get_h_predown_info(void *pInstance)
1812 {
1813 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1814 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1815 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_05_L, 0x8000))
1816 return TRUE;
1817 else
1818 return FALSE;
1819 }
HAL_SC_ip_get_v_predown_info(void * pInstance)1820 MS_BOOL HAL_SC_ip_get_v_predown_info(void *pInstance)
1821 {
1822 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1823 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1824 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_09_L, 0x8000))
1825 return TRUE;
1826 else
1827 return FALSE;
1828 }
HAL_SC_ip_set_h_predown_info(void * pInstance,MS_BOOL bEnable)1829 void HAL_SC_ip_set_h_predown_info(void *pInstance, MS_BOOL bEnable)
1830 {
1831 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1832 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1833 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_05_L, (bEnable?BIT(15):0), BIT(15));
1834 }
HAL_SC_ip_set_v_predown_info(void * pInstance,MS_BOOL bEnable)1835 void HAL_SC_ip_set_v_predown_info(void *pInstance, MS_BOOL bEnable)
1836 {
1837 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1838 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1839 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_09_L, (bEnable?BIT(15):0),BIT(15));
1840 }
1841
HAL_SC_ip_get_444to422_filter_mod(void * pInstance)1842 MS_BOOL HAL_SC_ip_get_444to422_filter_mod(void *pInstance)
1843 {
1844 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1845 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1846 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_0A_L, BIT(7)))
1847 return TRUE;
1848 else
1849 return FALSE;
1850 }
HAL_SC_ip_set_444to422_filter_mod(void * pInstance,MS_BOOL bEnable)1851 void HAL_SC_ip_set_444to422_filter_mod(void *pInstance, MS_BOOL bEnable)
1852 {
1853 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1854 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1855 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK02_0A_L, (bEnable?BIT(7):0), BIT(7));
1856 }
1857
1858 //F2 memory data format, BK12_01[10:8]
HAL_SC_get_memory_fmt(void * pInstance)1859 MS_U8 HAL_SC_get_memory_fmt(void *pInstance)
1860 {
1861 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1862 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1863 return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_01_L, 0x0700)>>8);
1864 }
1865
1866 //F2 IP memory data format, BK12_2[3:0]
HAL_SC_get_IPM_memory_fmt(void * pInstance)1867 MS_U8 HAL_SC_get_IPM_memory_fmt(void *pInstance)
1868 {
1869 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1870 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1871 return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_02_L, 0x000F));
1872 }
HAL_SC_set_IPM_memory_fmt(void * pInstance,MS_U8 u8Value)1873 void HAL_SC_set_IPM_memory_fmt(void *pInstance, MS_U8 u8Value)
1874 {
1875 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1876 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1877 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_02_L, (((MS_U16)u8Value)|BIT(8)),0x010F);
1878 }
1879
1880 //F2 OP memory data format, BK12_2[7:4]
HAL_SC_get_OPM_memory_fmt(void * pInstance)1881 MS_U8 HAL_SC_get_OPM_memory_fmt(void *pInstance)
1882 {
1883 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1884 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1885 return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_02_L, 0x00F0));
1886 }
HAL_SC_set_OPM_memory_fmt(void * pInstance,MS_U8 u8Value)1887 void HAL_SC_set_OPM_memory_fmt(void *pInstance, MS_U8 u8Value)
1888 {
1889 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1890 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1891 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_02_L, (((MS_U16)u8Value)<<4|(BIT(9))),0x02F0);
1892 }
1893
1894 //capture image to IP enable
HAL_SC_set_capture_image2ip(void * pInstance,MS_BOOL bEnable)1895 void HAL_SC_set_capture_image2ip(void *pInstance, MS_BOOL bEnable)
1896 {
1897 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1898 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1899 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_57_L, (bEnable ? BIT(11):0), BIT(11));
1900 }
HAL_SC_get_VOP_mux(void * pInstance)1901 MS_U8 HAL_SC_get_VOP_mux(void *pInstance)
1902 {
1903 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1904 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1905 return (MS_U8)SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_46_L, 0x00F0);
1906 }
1907
HAL_SC_set_VOP_mux(void * pInstance,MS_U8 u8Val)1908 void HAL_SC_set_VOP_mux(void *pInstance, MS_U8 u8Val)
1909 {
1910 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1911 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1912 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_46_L, (MS_U16)u8Val, 0x00F0);
1913 }
1914
HAL_SC_get_memory_bit_fmt(void * pInstance,SCALER_WIN eWindow)1915 MS_U8 HAL_SC_get_memory_bit_fmt(void *pInstance, SCALER_WIN eWindow)
1916 {
1917 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1918 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1919 if(eWindow == MAIN_WINDOW)
1920 return (MS_U8)SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_01_L, BIT(5)|BIT(4));
1921 else
1922 return (MS_U8)SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_41_L, BIT(5)|BIT(4));
1923 }
1924
1925 //F2 RGB/YUV 444 8-bits format
1926 //F2 RGB/YUV 444 10-bits format
1927 //(bEnable_8bit : bEnable_10bit)
1928 //(0:0)YCbCr422, (1:0)RGB/YCbCr444_8bit, (0:1)RGB/YCbCr444_10bit
HAL_SC_set_memory_bit(void * pInstance,MS_BOOL bEnable_8bit,MS_BOOL bEnable_10bit)1929 void HAL_SC_set_memory_bit(void *pInstance, MS_BOOL bEnable_8bit, MS_BOOL bEnable_10bit)
1930 {
1931 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1932 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1933 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_01_L, (MS_U16)((bEnable_10bit<<5)|bEnable_8bit<<4), (BIT(5)|BIT(4)));
1934 }
1935
HAL_SC_set_IPM_capture_start(void * pInstance,MS_BOOL bEnable)1936 void HAL_SC_set_IPM_capture_start(void *pInstance, MS_BOOL bEnable)
1937 {
1938 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1939 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1940 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_02_L, (MS_U16)(bEnable?BIT(15):0), BIT(15));
1941 }
1942
HAL_SC_get_IRQ_mask_0_31(void * pInstance)1943 MS_U32 HAL_SC_get_IRQ_mask_0_31(void *pInstance)
1944 {
1945 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1946 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1947 return (MS_U32)SC_R4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK00_14_L);
1948 }
1949
HAL_SC_set_IRQ_mask_0_31(void * pInstance,MS_U32 u32Val)1950 void HAL_SC_set_IRQ_mask_0_31(void *pInstance, MS_U32 u32Val)
1951 {
1952 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1953 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1954 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK00_14_L, u32Val);
1955 }
HAL_SC_set_GOP_Enable(void * pInstance,MS_U8 MaxGOP,MS_U8 UseNum,MS_U8 u8MuxNum,MS_BOOL bEnable)1956 MS_BOOL HAL_SC_set_GOP_Enable(void *pInstance, MS_U8 MaxGOP ,MS_U8 UseNum, MS_U8 u8MuxNum, MS_BOOL bEnable)
1957 {
1958 /* GOP OP Path enable to SC Setting
1959 T3: GOP OP Path blending with SC sequence
1960 mux0-->mux2-->mux3
1961 */
1962 MS_U16 u16regval;
1963 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1964 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1965
1966 if(UseNum > MaxGOP)
1967 return FALSE;
1968 u16regval = (MS_U16)SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK00_0C_L);
1969
1970 if(UseNum == (u8MuxNum & (BIT(0)|BIT(1)))) // Enable Mux0 to XC
1971 {
1972 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0C_L, bEnable?(u16regval|BIT(15)):(u16regval & (~ BIT(15))), BIT(15));
1973 }
1974 else if(UseNum == ((u8MuxNum & (BIT(4)|BIT(5)))>>4)) // Enable Mux2 to XC
1975 {
1976 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0C_L, bEnable?(u16regval|BIT(14)):(u16regval & (~ BIT(14))), BIT(14));
1977 }
1978 else if(UseNum == ((u8MuxNum & (BIT(6)|BIT(7)))>>6)) // Enable Mux3 to XC
1979 {
1980 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0C_L, bEnable?(u16regval|BIT(13)):(u16regval & (~ BIT(13))), BIT(13));
1981 }
1982 else
1983 {
1984 return FALSE;
1985 }
1986 return TRUE;
1987 }
1988
1989
1990 /********************************************************************************/
1991 /// Set GOP destination (OP/IP) setting to scaler
1992 /// @param ipSelGop \b IN \copydoc MS_XC_IPSEL_GOP
1993 /********************************************************************************/
HAL_SC_ip_sel_for_gop(void * pInstance,MS_U8 u8MuxNum,MS_XC_IPSEL_GOP ipSelGop)1994 void HAL_SC_ip_sel_for_gop(void *pInstance, MS_U8 u8MuxNum ,MS_XC_IPSEL_GOP ipSelGop)
1995 {
1996 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
1997 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
1998 switch(ipSelGop)
1999 {
2000 default:
2001 case MS_IP0_SEL_GOP0:
2002 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0xA0, 0xA0);
2003 if(0 == (u8MuxNum & 0x0003))
2004 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(12), BIT(12)); // mux 0
2005 else
2006 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(13), BIT(13)); // mux 1
2007 break;
2008 case MS_IP0_SEL_GOP1:
2009 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0xA0, 0xA0);
2010 if(1 == (u8MuxNum & 0x0003))
2011 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(12), BIT(12)); // mux 0
2012 else
2013 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(13), BIT(13)); // mux 1
2014 break;
2015 case MS_IP0_SEL_GOP2:
2016 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0xA0, 0xA0);
2017 if(2 == (u8MuxNum & 0x0003))
2018 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(12), BIT(12)); // mux 0
2019 else
2020 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(13), BIT(13)); // mux 1
2021 break;
2022 case MS_NIP_SEL_GOP0:
2023 if(0==(u8MuxNum &0x0003))
2024 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0, BIT(12)); // mux 0
2025 else
2026 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0, BIT(13)); // mux 1
2027 break;
2028 case MS_NIP_SEL_GOP1:
2029 if(1==(u8MuxNum &0x0003))
2030 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0, BIT(12)); // mux 0
2031 else
2032 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0, BIT(13)); // mux 1
2033 break;
2034 case MS_NIP_SEL_GOP2:
2035 if(2==(u8MuxNum &0x0003))
2036 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0, BIT(12)); // mux 0
2037 else
2038 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0, BIT(13)); // mux 1
2039 break;
2040 case MS_MVOP_SEL:
2041 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, 0xA0, 0xA0);
2042 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_0A_L, BIT(12), BIT(12)|BIT(13)); // mux 0
2043 break;
2044 }
2045 }
2046
2047
2048 /******************************************************************************/
2049 /// Set Scaler VOP New blending level
2050 /******************************************************************************/
HAL_SC_SetVOPNBL(void * pInstance)2051 void HAL_SC_SetVOPNBL(void *pInstance)
2052 {
2053 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2054 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2055 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_46_L, 0x20, 0x20);
2056 }
2057
2058 /******************************************************************************/
2059 /// Set handshaking mode
2060 /******************************************************************************/
Hal_SC_ip_set_handshaking_md(void * pInstance,MS_U8 u8MD,SCALER_WIN eWindow)2061 void Hal_SC_ip_set_handshaking_md(void *pInstance, MS_U8 u8MD, SCALER_WIN eWindow)
2062 {
2063 UNUSED(pInstance);
2064 u8MD = u8MD;
2065 eWindow = eWindow;
2066 }
2067
2068 //////////////////////////////////
2069 // Set IP1 Test Pattern
Hal_SC_ip_Set_TestPattern(void * pInstance,MS_U16 u16Enable,MS_U32 u32Pattern_type,SCALER_WIN eWindow)2070 void Hal_SC_ip_Set_TestPattern(void *pInstance, MS_U16 u16Enable, MS_U32 u32Pattern_type, SCALER_WIN eWindow)
2071 {
2072 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2073 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2074
2075 if( eWindow == MAIN_WINDOW )
2076 {
2077 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_40_L, u16Enable, 0xFFFF);
2078 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_42_L, (u32Pattern_type >> 8));
2079 if(u16Enable == PURE_COR_IP_PATTERN_VALUE)
2080 {
2081 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_43_L, (u32Pattern_type & 0x000F));
2082 }
2083 }
2084 else
2085 {
2086 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_40_L, u16Enable, 0xFFFF);
2087 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_42_L, (u32Pattern_type >> 8));
2088 if(u16Enable == PURE_COR_IP_PATTERN_VALUE)
2089 {
2090 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_43_L, (u32Pattern_type & 0x000F));
2091 }
2092 }
2093 }
2094
Hal_SC_adc_Set_TestPattern(void * pInstance,MS_U8 u8EnableADCType,MS_U16 u16Ramp)2095 void Hal_SC_adc_Set_TestPattern(void *pInstance,MS_U8 u8EnableADCType,MS_U16 u16Ramp)
2096 {
2097 W2BYTEMSK(REG_ADC_ATOP_75_L, u8EnableADCType,0x0F00);
2098 W2BYTEMSK(REG_ADC_ATOP_78_L, u16Ramp,0x03FF);
2099 W2BYTEMSK(REG_ADC_ATOP_75_L, u16Ramp? BIT(0):0,BIT(0));
2100 }
2101
Hal_SC_ipmux_Set_TestPattern(void * pInstance,MS_BOOL bEnable,MS_U16 u16R_CR_Data,MS_U16 u16G_Y_Data,MS_U16 u16B_CB_Data)2102 void Hal_SC_ipmux_Set_TestPattern(void *pInstance,MS_BOOL bEnable, MS_U16 u16R_CR_Data, MS_U16 u16G_Y_Data ,MS_U16 u16B_CB_Data)
2103 {
2104 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9));
2105 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12));
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13));
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14));
2108
2109 if(bEnable == TRUE)
2110 {
2111 W2BYTEMSK(REG_IPMUX_1D_L, u16R_CR_Data, BMASK(9:0));
2112 W2BYTEMSK(REG_IPMUX_1E_L, u16G_Y_Data, BMASK(9:0));
2113 W2BYTEMSK(REG_IPMUX_1F_L, u16B_CB_Data, BMASK(9:0));
2114 }
2115 }
2116
2117 //////////////////////////////////
2118 // Set OP Test Pattern
Hal_SC_op_Set_TestPattern(void * pInstance,MS_BOOL bMiuLineBuff,MS_BOOL bLineBuffHVSP)2119 void Hal_SC_op_Set_TestPattern(void *pInstance,MS_BOOL bMiuLineBuff, MS_BOOL bLineBuffHVSP)
2120 {
2121 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2122 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2123
2124 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK20_10_L, bMiuLineBuff? BIT(15):0,BIT(15));
2125 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK20_1F_L, bLineBuffHVSP? BIT(10):0,BIT(10));
2126 }
2127
2128 //////////////////////////////////
2129 // Set VOP Test Pattern
Hal_SC_vop_Set_TestPattern(void * pInstance,MS_BOOL bEnable)2130 void Hal_SC_vop_Set_TestPattern(void *pInstance, MS_BOOL bEnable)
2131 {
2132 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2133 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2134
2135 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_13_L, bEnable? BIT(8):0,BIT(8));
2136 }
2137
Hal_SC_vop2_Set_TestPattern(void * pInstance,MS_BOOL bEnable,MS_U16 u16R_Data,MS_U16 u16G_Data,MS_U16 u16B_Data)2138 void Hal_SC_vop2_Set_TestPattern(void *pInstance,MS_BOOL bEnable, MS_U16 u16R_Data, MS_U16 u16G_Data ,MS_U16 u16B_Data)
2139 {
2140 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2141 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2142
2143 #if (SUPPORT_OP2_TEST_PATTERN >0)
2144 XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
2145 UtopiaResourceGetPrivate(g_pXCResource[E_XC_POOL_ID_INTERNAL_VARIABLE],(void**)(&pXCResourcePrivate));
2146 if(bEnable == TRUE)
2147 {
2148 if(pXCResourcePrivate->stdrvXC_MVideo.bIsOP2TestPattern == FALSE)
2149 {
2150 pXCResourcePrivate->stdrvXC_MVideo.bIsOP2TestPattern = TRUE;
2151 pXCResourcePrivate->stdrvXC_MVideo.u16OP2_color_3x3 = SC_R2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_2F_L,0xFFFF);
2152 pXCResourcePrivate->stdrvXC_MVideo.bIsOP2InputSrcDisabled = Hal_SC_Is_InputSource_Disable(pInstance,MAIN_WINDOW) >> 7;
2153 pXCResourcePrivate->stdrvXC_MVideo.bIsOP2Mute = SC_R2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_19_L, BIT(1)) >> 1;
2154 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_19_L, 0,BIT(1));
2155 #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
2156 if (IsVBY1_16LANE((MS_U8)pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.eLPLL_Type))
2157 {
2158 pXCResourcePrivate->stdrvXC_MVideo_Context.bIsFRCMute = SC_R2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BKCB_17_L, BIT(1)) >> 1;
2159 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BKCB_17_L, 0,BIT(1));
2160 }
2161 #endif
2162 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK01_02_L, 0,BIT(7)); //input source disable
2163 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_2F_L,0x0000,0xFFFF); //disable 3x3
2164 }
2165 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK25_32_L, u16R_Data, BMASK(9:0));
2166 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK25_33_L, u16G_Data, BMASK(9:0));
2167 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK25_34_L, u16B_Data, BMASK(9:0));
2168 }
2169 else
2170 {
2171 if (pXCResourcePrivate->stdrvXC_MVideo.bIsOP2TestPattern == TRUE)
2172 {
2173 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_2F_L, pXCResourcePrivate->stdrvXC_MVideo.u16OP2_color_3x3, 0xFFFF); //restore 3x3
2174 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK10_19_L, (pXCResourcePrivate->stdrvXC_MVideo.bIsOP2Mute<< 1),BIT(1));
2175 #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
2176 if (IsVBY1_16LANE((MS_U8)pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.eLPLL_Type))
2177 {
2178 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BKCB_17_L, (pXCResourcePrivate->stdrvXC_MVideo_Context.bIsFRCMute << 1),BIT(1));
2179 }
2180 #endif
2181 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK01_02_L, (pXCResourcePrivate->stdrvXC_MVideo.bIsOP2InputSrcDisabled<< 7),BIT(7));
2182 pXCResourcePrivate->stdrvXC_MVideo.bIsOP2TestPattern = FALSE;
2183 }
2184 }
2185
2186 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK25_30_L, (bEnable), BIT(0));
2187 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK25_31_L, (bEnable), BIT(0));
2188 #endif
2189 }
2190
2191 //////////////////////////////////
2192 // Set MOD Test Pattern
Hal_SC_mod_Set_TestPattern(void * pInstance,MS_BOOL bEnable,MS_U16 u16R_Data,MS_U16 u16G_Data,MS_U16 u16B_Data)2193 void Hal_SC_mod_Set_TestPattern(void *pInstance,MS_BOOL bEnable, MS_U16 u16R_Data, MS_U16 u16G_Data ,MS_U16 u16B_Data)
2194 {
2195 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, bEnable? BIT(15):0,BIT(15));
2196 MOD_W2BYTEMSK(REG_MOD_BK00_02_L, u16R_Data, 0x3FF);
2197 MOD_W2BYTEMSK(REG_MOD_BK00_03_L, u16G_Data, 0x3FF);
2198 MOD_W2BYTEMSK(REG_MOD_BK00_04_L, u16B_Data, 0x3FF);
2199 }
2200
HAL_SC_ip_3DMainSub_IPSync(void * pInstance)2201 void HAL_SC_ip_3DMainSub_IPSync(void *pInstance)
2202 {
2203 MS_U16 value ;
2204 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2205 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2206
2207 //copy bk1 to bk3 and then reset fclk
2208 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_08_L);
2209 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_08_L, value);
2210
2211 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_09_L);
2212 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_09_L, value);
2213
2214 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_21_L);
2215 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value);
2216
2217 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_24_L);
2218 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_24_L, value);
2219
2220 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_25_L);
2221 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_25_L, value);
2222
2223 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L);
2224 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, value);
2225
2226 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_2F_L);
2227 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_2F_L, value);
2228
2229 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_02_L, 1 <<6, BIT(6));
2230 MsOS_DelayTask(100);
2231 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_02_L, 0x0, BIT(6));
2232 }
2233
HAL_SC_ip_detect_mode(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)2234 void HAL_SC_ip_detect_mode(void *pInstance,MS_BOOL bEnable, SCALER_WIN eWindow)
2235 {
2236 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2237 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2238 if (eWindow == MAIN_WINDOW)
2239 {
2240 if(bEnable)
2241 {
2242 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK01_29_L,BIT(5), BIT(5)|BIT(4));
2243 }
2244 else
2245 {
2246 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK01_29_L, 0 , BIT(5)|BIT(4));
2247 }
2248 }
2249 else
2250 {
2251 if(bEnable)
2252 {
2253 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK03_29_L,BIT(5), BIT(5)|BIT(4));
2254 }
2255 else
2256 {
2257 SC_W2BYTEMSK(psXCInstPri->u32DeviceID,REG_SC_BK03_29_L, 0 , BIT(5)|BIT(4));
2258 }
2259 }
2260
2261 }
2262
2263 /******************************************************************************/
2264 /// get the h/v sync active
2265 /******************************************************************************/
Hal_SC_ip_get_h_v_sync_active(void * pInstance,SCALER_WIN eWindow)2266 MS_U8 Hal_SC_ip_get_h_v_sync_active(void *pInstance, SCALER_WIN eWindow)
2267 {
2268 MS_U8 u8val;
2269 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2270 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2271
2272 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_33_L, BIT(8), BIT(8));
2273
2274 u8val = (SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_1E_L) & 0xC000) >> 8;
2275
2276 //SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK00_33_L, 0, BIT(8));
2277
2278 return u8val;
2279 }
2280
Hal_SC_set_skp_fd(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)2281 void Hal_SC_set_skp_fd(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow)
2282 {
2283 }
2284
2285 /******************************************************************************/
2286 /// Get the VGA SOG on or off
2287 /// @param bEnable \b IN: bEnable =1, Turn on the VGA SOG; bEnable =0, Turn off the VGA SOG
2288 /******************************************************************************/
HAL_SC_SetVGASogEn(void * pInstance,MS_BOOL bVGASogEn)2289 void HAL_SC_SetVGASogEn(void *pInstance, MS_BOOL bVGASogEn)
2290 {
2291 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2292 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2293 XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
2294 UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
2295 pXCResourcePrivate->sthal_IP._bSetVGASogEn = bVGASogEn;
2296 }
2297
2298 /******************************************************************************/
2299 /// Get the VGA SOG on or off
2300 /// @param u8 \b IN: bEnable =1, Turn on the VGA SOG; bEnable =0, Turn off the VGA SOG
2301 /******************************************************************************/
HAL_SC_GetVGASogEn(void * pInstance)2302 MS_BOOL HAL_SC_GetVGASogEn(void *pInstance)
2303 {
2304 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2305 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2306 XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
2307 UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
2308 return pXCResourcePrivate->sthal_IP._bSetVGASogEn;
2309 }
2310
2311 /******************************************************************************/
2312 /// Set the VGA SOG Detect Status
2313 /******************************************************************************/
HAL_SC_SetSogDetectStatus(void * pInstance,MS_U8 u8SogDetectStatus)2314 void HAL_SC_SetSogDetectStatus(void *pInstance, MS_U8 u8SogDetectStatus)
2315 {
2316 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2317 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2318 XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
2319 UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
2320 pXCResourcePrivate->sthal_IP._u8SetSogDetectStatus = u8SogDetectStatus;
2321 }
2322
2323 /******************************************************************************/
2324 /// Get the VGA SOG Detect Status
2325 /******************************************************************************/
HAL_SC_GetSogDetectStatus(void * pInstance)2326 MS_U8 HAL_SC_GetSogDetectStatus(void *pInstance)
2327 {
2328 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2329 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2330 XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
2331 UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
2332 return pXCResourcePrivate->sthal_IP._u8SetSogDetectStatus;
2333 }
2334
2335 /******************************************************************************/
2336 ///This function will return input frame rate
2337 ///@return
2338 ///- MS_U16 Vertical total
2339 /******************************************************************************/
HAL_SC_ip_get_verticalperiod(void * pInstance,SCALER_WIN eWindow)2340 MS_U32 HAL_SC_ip_get_verticalperiod(void *pInstance, SCALER_WIN eWindow)
2341 {
2342 MS_U32 u32verticalperiod=0;
2343 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2344 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2345
2346 if(eWindow == MAIN_WINDOW)
2347 {
2348 u32verticalperiod = SC_R4BYTE( psXCInstPri->u32DeviceID, REG_SC_BK01_3B_L );
2349 }
2350 else
2351 {
2352 u32verticalperiod = SC_R4BYTE( psXCInstPri->u32DeviceID, REG_SC_BK03_3B_L );
2353 }
2354
2355 return u32verticalperiod;
2356 }
2357
2358 /******************************************************************************/
2359 ///Set xc fd mask on/off by window
2360 /******************************************************************************/
HAL_SC_ip_Set_FD_Mask_ByWin(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)2361 void HAL_SC_ip_Set_FD_Mask_ByWin(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow)
2362 {
2363 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2364 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2365 if(eWindow == MAIN_WINDOW)
2366 {
2367 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8));
2368 }
2369 else
2370 {
2371 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, (bEnable?BIT(8):0), BIT(8));
2372 }
2373
2374 #if (HW_DESIGN_4K2K_VER == 4)
2375 // for FD_mask can control FRCM write
2376 Hal_SC_set_frcm_to_FD_mask(pInstance, bEnable, eWindow);
2377 #endif
2378 }
2379
2380 /******************************************************************************/
2381 ///Get xc fd mask by window
2382 ///@return MS_BOOL fd mask on/off
2383 /******************************************************************************/
HAL_SC_ip_Get_FD_Mask_ByWin(void * pInstance,SCALER_WIN eWindow)2384 MS_BOOL HAL_SC_ip_Get_FD_Mask_ByWin(void *pInstance, SCALER_WIN eWindow)
2385 {
2386 XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
2387 UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
2388 if(eWindow == MAIN_WINDOW)
2389 {
2390 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8)))
2391 return TRUE;
2392 else
2393 return FALSE;
2394 }
2395 else
2396 {
2397 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_26_L, BIT(8)))
2398 return TRUE;
2399 else
2400 return FALSE;
2401 }
2402 }
2403
2404 /******************************************************************************/
2405 ///Get fd mask read back status from decoder
2406 ///@return MS_BOOL fd mask on/off
2407 /******************************************************************************/
HAL_SC_ip_Get_FD_Mask_Status(void * pInstance,SCALER_WIN eWindow)2408 MS_BOOL HAL_SC_ip_Get_FD_Mask_Status(void *pInstance, SCALER_WIN eWindow)
2409 {
2410 return TRUE;
2411 }
2412
2413 /******************************************************************************/
2414 ///Set Force IP interlace when it is progressive timing
2415 ///@return EN_FORCEi_SUPPORT_TYPE ForceI_SW/ForceI_HW/ForceI_Auto
2416 /******************************************************************************/
HAL_SC_ip_get_forceI_support_type(void * pInstance)2417 EN_FORCEi_SUPPORT_TYPE HAL_SC_ip_get_forceI_support_type(void *pInstance)
2418 {
2419 return ForceI_HW;
2420 }
2421
2422 /******************************************************************************/
2423 ///Set H/V sync status check enable/disable
2424 ///@return
2425 /******************************************************************************/
HAL_SC_ip_set_hv_sync_status_check(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)2426 void HAL_SC_ip_set_hv_sync_status_check(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow)
2427 {
2428 if (eWindow == MAIN_WINDOW)
2429 {
2430 SC_W2BYTEMSK(0, REG_SC_BK01_48_L, bEnable << 6, BIT(6));
2431 }
2432 else
2433 {
2434 SC_W2BYTEMSK(0, REG_SC_BK03_48_L, bEnable << 6, BIT(6));
2435 }
2436 }
2437
2438 /******************************************************************************/
2439 ///Set new mode interlaced detect enable/disable
2440 ///@return
2441 /******************************************************************************/
HAL_SC_ip_set_new_mode_interlaced_detect(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)2442 void HAL_SC_ip_set_new_mode_interlaced_detect(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow)
2443 {
2444 if (eWindow == MAIN_WINDOW)
2445 {
2446 SC_W2BYTEMSK(0, REG_SC_BK01_48_L, bEnable, BIT(0));
2447 }
2448 else
2449 {
2450 SC_W2BYTEMSK(0, REG_SC_BK03_48_L, bEnable, BIT(0));
2451 }
2452 }
2453
2454 /******************************************************************************/
2455 ///Set H/V sync source select for mode detection
2456 ///@return
2457 /******************************************************************************/
HAL_SC_ip_set_hv_sync_source_select(void * pInstance,MS_U8 u8Source,SCALER_WIN eWindow)2458 void HAL_SC_ip_set_hv_sync_source_select(void *pInstance, MS_U8 u8Source, SCALER_WIN eWindow)
2459 {
2460 if (eWindow == MAIN_WINDOW)
2461 {
2462 SC_W2BYTEMSK(0, REG_SC_BK01_48_L, (u8Source & 0x3) << 1, BIT(2)|BIT(1));
2463 }
2464 else
2465 {
2466 SC_W2BYTEMSK(0, REG_SC_BK03_48_L, (u8Source & 0x3) << 1, BIT(2)|BIT(1));
2467 }
2468 }
2469
2470 /******************************************************************************/
2471 ///Set V total count by pixel clock enable/disable
2472 ///@return
2473 /******************************************************************************/
HAL_SC_ip_set_vtotal_count_by_pixel_clock(void * pInstance,MS_BOOL bEnable,SCALER_WIN eWindow)2474 void HAL_SC_ip_set_vtotal_count_by_pixel_clock(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow)
2475 {
2476 if (eWindow == MAIN_WINDOW)
2477 {
2478 SC_W2BYTEMSK(0, REG_SC_BK01_48_L, bEnable << 3, BIT(3));
2479 }
2480 else
2481 {
2482 SC_W2BYTEMSK(0, REG_SC_BK03_48_L, bEnable << 3, BIT(3));
2483 }
2484 }
2485
2486 /******************************************************************************/
2487 ///Set V sync invert
2488 ///@return
2489 /******************************************************************************/
HAL_SC_ip_set_vsync_invert(void * pInstance,MS_BOOL bInvert,SCALER_WIN eWindow)2490 void HAL_SC_ip_set_vsync_invert(void *pInstance, MS_BOOL bInvert, SCALER_WIN eWindow)
2491 {
2492 if (eWindow == MAIN_WINDOW)
2493 {
2494 SC_W2BYTEMSK(0, REG_SC_BK01_48_L, bInvert << 4, BIT(4));
2495 }
2496 else
2497 {
2498 SC_W2BYTEMSK(0, REG_SC_BK03_48_L, bInvert << 4, BIT(4));
2499 }
2500 }
2501
2502 /******************************************************************************/
2503 ///Set H sync invert
2504 ///@return
2505 /******************************************************************************/
HAL_SC_ip_set_hsync_invert(void * pInstance,MS_BOOL bInvert,SCALER_WIN eWindow)2506 void HAL_SC_ip_set_hsync_invert(void *pInstance, MS_BOOL bInvert, SCALER_WIN eWindow)
2507 {
2508 if (eWindow == MAIN_WINDOW)
2509 {
2510 SC_W2BYTEMSK(0, REG_SC_BK01_48_L, bInvert << 5, BIT(5));
2511 }
2512 else
2513 {
2514 SC_W2BYTEMSK(0, REG_SC_BK03_48_L, bInvert << 5, BIT(5));
2515 }
2516 }
2517
2518