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Searched refs:CKG_FICLK_F1_MASK (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_xc_chip_config.h489 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_xc_chip_config.h489 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h644 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h642 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h657 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h663 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_xc_chip_config.h663 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_xc_chip_config.h665 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
H A Dmhal_xc_chip_config.h.0664 #define CKG_FICLK_F1_MASK BMASK(3:2)
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h639 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h739 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h699 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h751 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h689 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h756 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h743 #define CKG_FICLK_F1_MASK BMASK(3:2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_sc.c653 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_IDCLK1, CKG_FICLK_F1_MASK); // clk_idclk1 in Hal_SC_set_ficlk()
657 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_FCLK, CKG_FICLK_F1_MASK); // clk_fclk in Hal_SC_set_ficlk()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_sc.c587 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_IDCLK1, CKG_FICLK_F1_MASK); // clk_idclk1 in Hal_SC_set_ficlk()
591 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_FCLK, CKG_FICLK_F1_MASK); // clk_fclk in Hal_SC_set_ficlk()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_sc.c653 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_IDCLK1, CKG_FICLK_F1_MASK); // clk_idclk1 in Hal_SC_set_ficlk()
657 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_FCLK, CKG_FICLK_F1_MASK); // clk_fclk in Hal_SC_set_ficlk()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_sc.c784 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_IDCLK1, CKG_FICLK_F1_MASK); // clk_idclk1 in Hal_SC_set_ficlk()
788 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_FCLK, CKG_FICLK_F1_MASK); // clk_fclk in Hal_SC_set_ficlk()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c399 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_IDCLK1, CKG_FICLK_F1_MASK); // clk_idclk1 in Hal_SC_set_ficlk()
403 W2BYTEMSK(REG_CKG_FICLK_F1, CKG_FICLK_F1_FCLK, CKG_FICLK_F1_MASK); // clk_fclk in Hal_SC_set_ficlk()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo.c1118 …MDrv_WriteByteMask(REG_CKG_FICLK_F1, CKG_FICLK_F1_FLK, CKG_FICLK_F1_MASK); // select FClk fir… in _MApi_XC_Init_WithoutCreateMutex()
H A Dmvideo.c.01115 …MDrv_WriteByteMask(REG_CKG_FICLK_F1, CKG_FICLK_F1_FLK, CKG_FICLK_F1_MASK); // select FClk fir…