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Searched refs:CKG_EDCLK_F1_GATED (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h617 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h615 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h596 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h696 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h656 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h708 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h646 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h713 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h700 #define CKG_EDCLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c5060 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c5196 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c6302 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c7025 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c7063 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c7593 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c7616 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c7828 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c7829 … MDrv_WriteByteMask(REG_CKG_EDCLK_F1, (bEnable? 0x00 : CKG_EDCLK_F1_GATED), CKG_EDCLK_F1_GATED); in Hal_SC_set_edclk()