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Searched refs:CFG6_7A_REG_CLK_RESET_FIQ0 (Results 1 – 5 of 5) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h2423 #define CFG6_7A_REG_CLK_RESET_FIQ0 0x0100 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h2423 #define CFG6_7A_REG_CLK_RESET_FIQ0 0x0100 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h2461 #define CFG6_7A_REG_CLK_RESET_FIQ0 0x0100 macro
H A DhalTSP.c8532 REG16_SET(&_RegCtrl6->CFG6_7A,CFG6_7A_REG_CLK_RESET_FIQ0 << u32Idx); in HAL_TSP_Module_Reset()
8629 REG16_CLR(&_RegCtrl6->CFG6_7A,CFG6_7A_REG_CLK_RESET_FIQ0 << u32Idx); in HAL_TSP_Module_Reset()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c5938 REG16_SET(&_RegCtrl6->CFG6_7A,CFG6_7A_REG_CLK_RESET_FIQ0 << u32Idx); in HAL_TSP_Module_Reset()
6035 REG16_CLR(&_RegCtrl6->CFG6_7A,CFG6_7A_REG_CLK_RESET_FIQ0 << u32Idx); in HAL_TSP_Module_Reset()