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Searched refs:BK_CLK0 (Results 1 – 25 of 60) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mspi/hal/curry/mspi/
H A DhalMSPI.c61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h121 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/maldives/mspi/
H A DhalMSPI.c114 .u32ClkBaseAddr = BASEADDR_RIU + BK_CLK0
302 _hal_msp.u32ClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h99 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/mooney/mspi/
H A DhalMSPI.c61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
250 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/k6lite/mspi/
H A DhalMSPI.c61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/mustang/mspi/
H A DhalMSPI.c114 .u32ClkBaseAddr = BASEADDR_RIU + BK_CLK0
302 _hal_msp.u32ClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h99 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/k6/mspi/
H A DhalMSPI.c61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/macan/mspi/
H A DhalMSPI.c61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
250 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/messi/mspi/
H A DhalMSPI.c64 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
253 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/mainz/mspi/
H A DhalMSPI.c64 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
253 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/kano/mspi/
H A DhalMSPI.c61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
H A DregMSPI.h122 #define BK_CLK0 0xB00*2 macro
/utopia/UTPA2-700.0.x/modules/mspi/hal/M7621/mspi/
H A DhalMSPI.c66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
/utopia/UTPA2-700.0.x/modules/mspi/hal/M7821/mspi/
H A DhalMSPI.c66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
/utopia/UTPA2-700.0.x/modules/mspi/hal/manhattan/mspi/
H A DhalMSPI.c66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
/utopia/UTPA2-700.0.x/modules/mspi/hal/maxim/mspi/
H A DhalMSPI.c66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
/utopia/UTPA2-700.0.x/modules/mspi/hal/maserati/mspi/
H A DhalMSPI.c66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0
267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()

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