| /utopia/UTPA2-700.0.x/modules/gpio/hal/k6/gpio/ |
| H A D | halGPIO.c | 126 #define BIT5 BIT(5) macro
276 #define GPIO28_OEN 0x000496, BIT5
286 #define GPIO30_OEN 0x010718, BIT5
336 #define GPIO40_OEN 0x1025ec, BIT5
341 #define GPIO41_OEN 0x1025ee, BIT5
346 #define GPIO42_OEN 0x102556, BIT5
351 #define GPIO43_OEN 0x102558, BIT5
356 #define GPIO44_OEN 0x10255a, BIT5
361 #define GPIO45_OEN 0x10255c, BIT5
366 #define GPIO46_OEN 0x10255e, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/k7u/gpio/ |
| H A D | halGPIO.c | 126 #define BIT5 BIT(5) macro
276 #define GPIO28_OEN 0x000496, BIT5
286 #define GPIO30_OEN 0x010718, BIT5
336 #define GPIO40_OEN 0x1025ec, BIT5
341 #define GPIO41_OEN 0x1025ee, BIT5
346 #define GPIO42_OEN 0x102556, BIT5
351 #define GPIO43_OEN 0x102558, BIT5
356 #define GPIO44_OEN 0x10255a, BIT5
361 #define GPIO45_OEN 0x10255c, BIT5
366 #define GPIO46_OEN 0x10255e, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/k6lite/gpio/ |
| H A D | halGPIO.c | 126 #define BIT5 BIT(5) macro
386 #define GPIO50_OEN 0x001423, BIT5
387 #define GPIO50_OUT 0x001424, BIT5
388 #define GPIO50_IN 0x001425, BIT5
391 #define GPIO51_OEN 0x1025ec, BIT5
396 #define GPIO52_OEN 0x1025ee, BIT5
401 #define GPIO53_OEN 0x1025a4, BIT5
406 #define GPIO54_OEN 0x1025a6, BIT5
411 #define GPIO55_OEN 0x1025a8, BIT5
416 #define GPIO56_OEN 0x1025aa, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/kano/gpio/ |
| H A D | halGPIO.c | 126 #define BIT5 BIT(5) macro
266 #define GPIO26_OEN 0x000496, BIT5
276 #define GPIO28_OEN 0x010718, BIT5
396 #define GPIO52_OEN 0x1025ec, BIT5
401 #define GPIO53_OEN 0x1025ee, BIT5
411 #define GPIO55_OEN 0x102558, BIT5
416 #define GPIO56_OEN 0x10255a, BIT5
421 #define GPIO57_OEN 0x10255c, BIT5
426 #define GPIO58_OEN 0x10255e, BIT5
431 #define GPIO59_OEN 0x102560, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/curry/gpio/ |
| H A D | halGPIO.c | 126 #define BIT5 BIT(5) macro
236 #define GPIO20_OEN 0x102558, BIT5
241 #define GPIO21_OEN 0x10255a, BIT5
246 #define GPIO22_OEN 0x10255c, BIT5
251 #define GPIO23_OEN 0x10255e, BIT5
256 #define GPIO24_OEN 0x102560, BIT5
261 #define GPIO25_OEN 0x102562, BIT5
266 #define GPIO26_OEN 0x102564, BIT5
271 #define GPIO27_OEN 0x1025a4, BIT5
276 #define GPIO28_OEN 0x1025a6, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/maldives/gpio/ |
| H A D | halGPIO.c | 110 #define BIT5 BIT(5) macro
264 #define GPIO27_OUT 0x0e4e, BIT5
283 #define GPIO31_OEN 0x0496, BIT5
293 #define GPIO33_OEN 0x0497, BIT5
303 #define GPIO35_OEN 0x0498, BIT5
313 #define GPIO37_OEN 0x0499, BIT5
353 #define GPIO45_OEN 0x0494, BIT5
383 #define GPIO51_OEN 0x101e5C, BIT5
384 #define GPIO51_OUT 0x101e56, BIT5
385 #define GPIO51_IN 0x101e50, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/mustang/gpio/ |
| H A D | halGPIO.c | 110 #define BIT5 BIT(5) macro
264 #define GPIO27_OUT 0x0e4e, BIT5
283 #define GPIO31_OEN 0x0496, BIT5
293 #define GPIO33_OEN 0x0497, BIT5
303 #define GPIO35_OEN 0x0498, BIT5
313 #define GPIO37_OEN 0x0499, BIT5
353 #define GPIO45_OEN 0x0494, BIT5
398 #define GPIO54_OEN 0x101e5C, BIT5
399 #define GPIO54_OUT 0x101e56, BIT5
400 #define GPIO54_IN 0x101e50, BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/maldives/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/macan/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/mooney/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/messi/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/manhattan/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/M7821/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/mainz/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/mustang/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/maxim/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/M7621/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/curry/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/kano/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/pws/hal/maserati/pws/ |
| H A D | regCLKGEN.h | 112 #define CKG_MIU_INVERT BIT5
134 #define CKG_TCK_INVERT BIT5
151 #define CKG_STC0_INVERT BIT5
160 #define CKG_MAD_STC_INVERT BIT5
178 #define CKG_MVD_INVERT BIT5
195 #define CKG_DC0_INVERT BIT5
219 #define CKG_GE_INVERT BIT5
237 #define CKG_GOPG1_INVERT BIT5
255 #define CKG_VD_INVERT BIT5
273 #define CKG_VD200_INVERT BIT5
[all …]
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/ |
| H A D | regMVOP.h | 150 #define VOP_CCIR_MD BIT5
180 #define VOP_HI_TSH (BIT3|BIT4|BIT5|BIT6) //DMA High priority threshold
194 #define VOP_DRAM_RD_MODE BIT5
212 #define VOP_TILE_32x32 BIT5
222 #define VOP_DEBUG_SEL (BIT5 | BIT6 | BIT7) //u3 new: MVOP debug out select
242 #define VOP_DMA_STATUS (BIT7 | BIT6 | BIT5 | BIT4)
262 #define VOP_MIU_128B_I64 BIT5
273 #define VOP_MSB_BUF0_MIU_SEL (BIT4|BIT5) // Y miu select: miu0~3 = 0x0~0x3
290 #define VOP_INFO_FROM_CODEC_RANGE_MAP (BIT5) //range map
298 #define VOP_INFO_FROM_CODEC_MIU_BUF1_SEL (BIT5) //LSB miu select
[all …]
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/ |
| H A D | regMVOP.h | 151 #define VOP_CCIR_MD BIT5
181 #define VOP_HI_TSH (BIT3|BIT4|BIT5|BIT6) //DMA High priority threshold
199 #define VOP_DRAM_RD_MODE BIT5
217 #define VOP_TILE_32x32 BIT5
227 #define VOP_DEBUG_SEL (BIT5 | BIT6 | BIT7) //u3 new: MVOP debug out select
247 #define VOP_DMA_STATUS (BIT7 | BIT6 | BIT5 | BIT4)
267 #define VOP_MIU_128B_I64 BIT5
278 #define VOP_MSB_BUF0_MIU_SEL (BIT4|BIT5) // Y miu select: miu0~3 = 0x0~0x3
295 #define VOP_INFO_FROM_CODEC_RANGE_MAP (BIT5) //range map
303 #define VOP_INFO_FROM_CODEC_MIU_BUF1_SEL (BIT5) //LSB miu select
[all …]
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/ |
| H A D | regMVOP.h | 150 #define VOP_CCIR_MD BIT5
180 #define VOP_HI_TSH (BIT3|BIT4|BIT5|BIT6) //DMA High priority threshold
194 #define VOP_DRAM_RD_MODE BIT5
212 #define VOP_TILE_32x32 BIT5
222 #define VOP_DEBUG_SEL (BIT5 | BIT6 | BIT7) //u3 new: MVOP debug out select
242 #define VOP_DMA_STATUS (BIT7 | BIT6 | BIT5 | BIT4)
262 #define VOP_MIU_128B_I64 BIT5
273 #define VOP_MSB_BUF0_MIU_SEL (BIT4|BIT5) // Y miu select: miu0~3 = 0x0~0x3
290 #define VOP_INFO_FROM_CODEC_RANGE_MAP (BIT5) //range map
298 #define VOP_INFO_FROM_CODEC_MIU_BUF1_SEL (BIT5) //LSB miu select
[all …]
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