xref: /utopia/UTPA2-700.0.x/modules/gpio/hal/k6lite/gpio/halGPIO.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi //<MStar Software>
2*53ee8cc1Swenshuai.xi //******************************************************************************
3*53ee8cc1Swenshuai.xi // MStar Software
4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are
6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
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77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
79*53ee8cc1Swenshuai.xi //
80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81*53ee8cc1Swenshuai.xi // All rights reserved.
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85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence
86*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient.
87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure,
88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling,
89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential
90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the
91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom.
92*53ee8cc1Swenshuai.xi //
93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi #ifndef _HALGPIO_C_
96*53ee8cc1Swenshuai.xi #define _HALGPIO_C_
97*53ee8cc1Swenshuai.xi 
98*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
99*53ee8cc1Swenshuai.xi //  Include Files
100*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
101*53ee8cc1Swenshuai.xi 
102*53ee8cc1Swenshuai.xi #include "MsCommon.h"
103*53ee8cc1Swenshuai.xi #include "MsTypes.h"
104*53ee8cc1Swenshuai.xi #include "drvGPIO.h"
105*53ee8cc1Swenshuai.xi #include "halGPIO.h"
106*53ee8cc1Swenshuai.xi #include "regGPIO.h"
107*53ee8cc1Swenshuai.xi 
108*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
109*53ee8cc1Swenshuai.xi //  Driver Compiler Options
110*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
113*53ee8cc1Swenshuai.xi //  Local Defines
114*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
115*53ee8cc1Swenshuai.xi #define GPIO_HAL_ERR(x, args...)        //{printf(x, ##args);}
116*53ee8cc1Swenshuai.xi #define GPIO_HAL_NOTSUPPORT()           {printf("%s not support!\n", __FUNCTION__);}
117*53ee8cc1Swenshuai.xi 
118*53ee8cc1Swenshuai.xi #define _CONCAT( a, b )     a##b
119*53ee8cc1Swenshuai.xi #define CONCAT( a, b )      _CONCAT( a, b )
120*53ee8cc1Swenshuai.xi 
121*53ee8cc1Swenshuai.xi #define BIT0    BIT(0)
122*53ee8cc1Swenshuai.xi #define BIT1    BIT(1)
123*53ee8cc1Swenshuai.xi #define BIT2    BIT(2)
124*53ee8cc1Swenshuai.xi #define BIT3    BIT(3)
125*53ee8cc1Swenshuai.xi #define BIT4    BIT(4)
126*53ee8cc1Swenshuai.xi #define BIT5    BIT(5)
127*53ee8cc1Swenshuai.xi #define BIT6    BIT(6)
128*53ee8cc1Swenshuai.xi #define BIT7    BIT(7)
129*53ee8cc1Swenshuai.xi 
130*53ee8cc1Swenshuai.xi // Dummy
131*53ee8cc1Swenshuai.xi #define GPIO999_OEN     0, 0
132*53ee8cc1Swenshuai.xi #define GPIO999_OUT     0, 0
133*53ee8cc1Swenshuai.xi #define GPIO999_IN      0, 0
134*53ee8cc1Swenshuai.xi 
135*53ee8cc1Swenshuai.xi #define GPIO0_PAD PAD_PM_IRIN
136*53ee8cc1Swenshuai.xi #define GPIO0_OEN 0x000f28, BIT0
137*53ee8cc1Swenshuai.xi #define GPIO0_OUT 0x000f28, BIT1
138*53ee8cc1Swenshuai.xi #define GPIO0_IN  0x000f28, BIT2
139*53ee8cc1Swenshuai.xi 
140*53ee8cc1Swenshuai.xi #define GPIO1_PAD PAD_PM_SPI_CZ
141*53ee8cc1Swenshuai.xi #define GPIO1_OEN 0x000f30, BIT0
142*53ee8cc1Swenshuai.xi #define GPIO1_OUT 0x000f30, BIT1
143*53ee8cc1Swenshuai.xi #define GPIO1_IN  0x000f30, BIT2
144*53ee8cc1Swenshuai.xi 
145*53ee8cc1Swenshuai.xi #define GPIO2_PAD PAD_PM_SPI_CK
146*53ee8cc1Swenshuai.xi #define GPIO2_OEN 0x000f32, BIT0
147*53ee8cc1Swenshuai.xi #define GPIO2_OUT 0x000f32, BIT1
148*53ee8cc1Swenshuai.xi #define GPIO2_IN  0x000f32, BIT2
149*53ee8cc1Swenshuai.xi 
150*53ee8cc1Swenshuai.xi #define GPIO3_PAD PAD_PM_SPI_DI
151*53ee8cc1Swenshuai.xi #define GPIO3_OEN 0x000f34, BIT0
152*53ee8cc1Swenshuai.xi #define GPIO3_OUT 0x000f34, BIT1
153*53ee8cc1Swenshuai.xi #define GPIO3_IN  0x000f34, BIT2
154*53ee8cc1Swenshuai.xi 
155*53ee8cc1Swenshuai.xi #define GPIO4_PAD PAD_PM_SPI_DO
156*53ee8cc1Swenshuai.xi #define GPIO4_OEN 0x000f36, BIT0
157*53ee8cc1Swenshuai.xi #define GPIO4_OUT 0x000f36, BIT1
158*53ee8cc1Swenshuai.xi #define GPIO4_IN  0x000f36, BIT2
159*53ee8cc1Swenshuai.xi 
160*53ee8cc1Swenshuai.xi #define GPIO5_PAD PAD_PM_SPI_WPZ
161*53ee8cc1Swenshuai.xi #define GPIO5_OEN 0x000f88, BIT0
162*53ee8cc1Swenshuai.xi #define GPIO5_OUT 0x000f88, BIT1
163*53ee8cc1Swenshuai.xi #define GPIO5_IN  0x000f88, BIT2
164*53ee8cc1Swenshuai.xi 
165*53ee8cc1Swenshuai.xi #define GPIO6_PAD PAD_PM_SPI_HOLDZ
166*53ee8cc1Swenshuai.xi #define GPIO6_OEN 0x000f8a, BIT0
167*53ee8cc1Swenshuai.xi #define GPIO6_OUT 0x000f8a, BIT1
168*53ee8cc1Swenshuai.xi #define GPIO6_IN  0x000f8a, BIT2
169*53ee8cc1Swenshuai.xi 
170*53ee8cc1Swenshuai.xi #define GPIO7_PAD PAD_PM_SPI_RSTZ
171*53ee8cc1Swenshuai.xi #define GPIO7_OEN 0x000f8c, BIT0
172*53ee8cc1Swenshuai.xi #define GPIO7_OUT 0x000f8c, BIT1
173*53ee8cc1Swenshuai.xi #define GPIO7_IN  0x000f8c, BIT2
174*53ee8cc1Swenshuai.xi 
175*53ee8cc1Swenshuai.xi #define GPIO8_PAD PAD_PM_GPIO0
176*53ee8cc1Swenshuai.xi #define GPIO8_OEN 0x000f00, BIT0
177*53ee8cc1Swenshuai.xi #define GPIO8_OUT 0x000f00, BIT1
178*53ee8cc1Swenshuai.xi #define GPIO8_IN  0x000f00, BIT2
179*53ee8cc1Swenshuai.xi 
180*53ee8cc1Swenshuai.xi #define GPIO9_PAD PAD_PM_GPIO1
181*53ee8cc1Swenshuai.xi #define GPIO9_OEN 0x000f02, BIT0
182*53ee8cc1Swenshuai.xi #define GPIO9_OUT 0x000f02, BIT1
183*53ee8cc1Swenshuai.xi #define GPIO9_IN  0x000f02, BIT2
184*53ee8cc1Swenshuai.xi 
185*53ee8cc1Swenshuai.xi #define GPIO10_PAD PAD_PM_GPIO2
186*53ee8cc1Swenshuai.xi #define GPIO10_OEN 0x000f04, BIT0
187*53ee8cc1Swenshuai.xi #define GPIO10_OUT 0x000f04, BIT1
188*53ee8cc1Swenshuai.xi #define GPIO10_IN  0x000f04, BIT2
189*53ee8cc1Swenshuai.xi 
190*53ee8cc1Swenshuai.xi #define GPIO11_PAD PAD_PM_GPIO3
191*53ee8cc1Swenshuai.xi #define GPIO11_OEN 0x000f06, BIT0
192*53ee8cc1Swenshuai.xi #define GPIO11_OUT 0x000f06, BIT1
193*53ee8cc1Swenshuai.xi #define GPIO11_IN  0x000f06, BIT2
194*53ee8cc1Swenshuai.xi 
195*53ee8cc1Swenshuai.xi #define GPIO12_PAD PAD_PM_GPIO4
196*53ee8cc1Swenshuai.xi #define GPIO12_OEN 0x000f08, BIT0
197*53ee8cc1Swenshuai.xi #define GPIO12_OUT 0x000f08, BIT1
198*53ee8cc1Swenshuai.xi #define GPIO12_IN  0x000f08, BIT2
199*53ee8cc1Swenshuai.xi 
200*53ee8cc1Swenshuai.xi #define GPIO13_PAD PAD_PM_GPIO5
201*53ee8cc1Swenshuai.xi #define GPIO13_OEN 0x000f0a, BIT0
202*53ee8cc1Swenshuai.xi #define GPIO13_OUT 0x000f0a, BIT1
203*53ee8cc1Swenshuai.xi #define GPIO13_IN  0x000f0a, BIT2
204*53ee8cc1Swenshuai.xi 
205*53ee8cc1Swenshuai.xi #define GPIO14_PAD PAD_PM_GPIO6
206*53ee8cc1Swenshuai.xi #define GPIO14_OEN 0x000f0c, BIT0
207*53ee8cc1Swenshuai.xi #define GPIO14_OUT 0x000f0c, BIT1
208*53ee8cc1Swenshuai.xi #define GPIO14_IN  0x000f0c, BIT2
209*53ee8cc1Swenshuai.xi 
210*53ee8cc1Swenshuai.xi #define GPIO15_PAD PAD_PM_GPIO7
211*53ee8cc1Swenshuai.xi #define GPIO15_OEN 0x000f0e, BIT0
212*53ee8cc1Swenshuai.xi #define GPIO15_OUT 0x000f0e, BIT1
213*53ee8cc1Swenshuai.xi #define GPIO15_IN  0x000f0e, BIT2
214*53ee8cc1Swenshuai.xi 
215*53ee8cc1Swenshuai.xi #define GPIO16_PAD PAD_PM_GPIO8
216*53ee8cc1Swenshuai.xi #define GPIO16_OEN 0x000f10, BIT0
217*53ee8cc1Swenshuai.xi #define GPIO16_OUT 0x000f10, BIT1
218*53ee8cc1Swenshuai.xi #define GPIO16_IN  0x000f10, BIT2
219*53ee8cc1Swenshuai.xi 
220*53ee8cc1Swenshuai.xi #define GPIO17_PAD PAD_PM_GPIO9
221*53ee8cc1Swenshuai.xi #define GPIO17_OEN 0x000f12, BIT0
222*53ee8cc1Swenshuai.xi #define GPIO17_OUT 0x000f12, BIT1
223*53ee8cc1Swenshuai.xi #define GPIO17_IN  0x000f12, BIT2
224*53ee8cc1Swenshuai.xi 
225*53ee8cc1Swenshuai.xi #define GPIO18_PAD PAD_PM_GPIO10
226*53ee8cc1Swenshuai.xi #define GPIO18_OEN 0x000f14, BIT0
227*53ee8cc1Swenshuai.xi #define GPIO18_OUT 0x000f14, BIT1
228*53ee8cc1Swenshuai.xi #define GPIO18_IN  0x000f14, BIT2
229*53ee8cc1Swenshuai.xi 
230*53ee8cc1Swenshuai.xi #define GPIO19_PAD PAD_PM_GPIO11
231*53ee8cc1Swenshuai.xi #define GPIO19_OEN 0x000f16, BIT0
232*53ee8cc1Swenshuai.xi #define GPIO19_OUT 0x000f16, BIT1
233*53ee8cc1Swenshuai.xi #define GPIO19_IN  0x000f16, BIT2
234*53ee8cc1Swenshuai.xi 
235*53ee8cc1Swenshuai.xi #define GPIO20_PAD PAD_PM_GPIO12
236*53ee8cc1Swenshuai.xi #define GPIO20_OEN 0x000f18, BIT0
237*53ee8cc1Swenshuai.xi #define GPIO20_OUT 0x000f18, BIT1
238*53ee8cc1Swenshuai.xi #define GPIO20_IN  0x000f18, BIT2
239*53ee8cc1Swenshuai.xi 
240*53ee8cc1Swenshuai.xi #define GPIO21_PAD PAD_PM_GPIO13
241*53ee8cc1Swenshuai.xi #define GPIO21_OEN 0x000f1a, BIT0
242*53ee8cc1Swenshuai.xi #define GPIO21_OUT 0x000f1a, BIT1
243*53ee8cc1Swenshuai.xi #define GPIO21_IN  0x000f1a, BIT2
244*53ee8cc1Swenshuai.xi 
245*53ee8cc1Swenshuai.xi #define GPIO22_PAD PAD_PM_GPIO14
246*53ee8cc1Swenshuai.xi #define GPIO22_OEN 0x000f1c, BIT0
247*53ee8cc1Swenshuai.xi #define GPIO22_OUT 0x000f1c, BIT1
248*53ee8cc1Swenshuai.xi #define GPIO22_IN  0x000f1c, BIT2
249*53ee8cc1Swenshuai.xi 
250*53ee8cc1Swenshuai.xi #define GPIO23_PAD PAD_PM_GPIO15
251*53ee8cc1Swenshuai.xi #define GPIO23_OEN 0x000f1e, BIT0
252*53ee8cc1Swenshuai.xi #define GPIO23_OUT 0x000f1e, BIT1
253*53ee8cc1Swenshuai.xi #define GPIO23_IN  0x000f1e, BIT2
254*53ee8cc1Swenshuai.xi 
255*53ee8cc1Swenshuai.xi #define GPIO24_PAD PAD_PM_CEC
256*53ee8cc1Swenshuai.xi #define GPIO24_OEN 0x000f2c, BIT0
257*53ee8cc1Swenshuai.xi #define GPIO24_OUT 0x000f2c, BIT1
258*53ee8cc1Swenshuai.xi #define GPIO24_IN  0x000f2c, BIT2
259*53ee8cc1Swenshuai.xi 
260*53ee8cc1Swenshuai.xi #define GPIO25_PAD PAD_HDMITX_HPD
261*53ee8cc1Swenshuai.xi #define GPIO25_OEN 0x001166, BIT3
262*53ee8cc1Swenshuai.xi #define GPIO25_OUT 0x001166, BIT2
263*53ee8cc1Swenshuai.xi #define GPIO25_IN  0x001166, BIT0
264*53ee8cc1Swenshuai.xi 
265*53ee8cc1Swenshuai.xi #define GPIO26_PAD PAD_PM_SD_CDZ
266*53ee8cc1Swenshuai.xi #define GPIO26_OEN 0x000f8e, BIT0
267*53ee8cc1Swenshuai.xi #define GPIO26_OUT 0x000f8e, BIT1
268*53ee8cc1Swenshuai.xi #define GPIO26_IN  0x000f8e, BIT2
269*53ee8cc1Swenshuai.xi 
270*53ee8cc1Swenshuai.xi #define GPIO27_PAD PAD_VID0
271*53ee8cc1Swenshuai.xi #define GPIO27_OEN 0x000f90, BIT0
272*53ee8cc1Swenshuai.xi #define GPIO27_OUT 0x000f90, BIT1
273*53ee8cc1Swenshuai.xi #define GPIO27_IN  0x000f90, BIT2
274*53ee8cc1Swenshuai.xi 
275*53ee8cc1Swenshuai.xi #define GPIO28_PAD PAD_VID1
276*53ee8cc1Swenshuai.xi #define GPIO28_OEN 0x000f92, BIT0
277*53ee8cc1Swenshuai.xi #define GPIO28_OUT 0x000f92, BIT1
278*53ee8cc1Swenshuai.xi #define GPIO28_IN  0x000f92, BIT2
279*53ee8cc1Swenshuai.xi 
280*53ee8cc1Swenshuai.xi #define GPIO29_PAD PAD_PM_GT0_MDIO
281*53ee8cc1Swenshuai.xi #define GPIO29_OEN 0x000f50, BIT0
282*53ee8cc1Swenshuai.xi #define GPIO29_OUT 0x000f50, BIT1
283*53ee8cc1Swenshuai.xi #define GPIO29_IN  0x000f50, BIT2
284*53ee8cc1Swenshuai.xi 
285*53ee8cc1Swenshuai.xi #define GPIO30_PAD PAD_PM_GT0_MDC
286*53ee8cc1Swenshuai.xi #define GPIO30_OEN 0x000f4e, BIT0
287*53ee8cc1Swenshuai.xi #define GPIO30_OUT 0x000f4e, BIT1
288*53ee8cc1Swenshuai.xi #define GPIO30_IN  0x000f4e, BIT2
289*53ee8cc1Swenshuai.xi 
290*53ee8cc1Swenshuai.xi #define GPIO31_PAD PAD_PM_GT0_RX_CLK
291*53ee8cc1Swenshuai.xi #define GPIO31_OEN 0x000f52, BIT0
292*53ee8cc1Swenshuai.xi #define GPIO31_OUT 0x000f52, BIT1
293*53ee8cc1Swenshuai.xi #define GPIO31_IN  0x000f52, BIT2
294*53ee8cc1Swenshuai.xi 
295*53ee8cc1Swenshuai.xi #define GPIO32_PAD PAD_PM_GT0_RX_CTL
296*53ee8cc1Swenshuai.xi #define GPIO32_OEN 0x000f54, BIT0
297*53ee8cc1Swenshuai.xi #define GPIO32_OUT 0x000f54, BIT1
298*53ee8cc1Swenshuai.xi #define GPIO32_IN  0x000f54, BIT2
299*53ee8cc1Swenshuai.xi 
300*53ee8cc1Swenshuai.xi #define GPIO33_PAD PAD_PM_GT0_RX_D0
301*53ee8cc1Swenshuai.xi #define GPIO33_OEN 0x000f56, BIT0
302*53ee8cc1Swenshuai.xi #define GPIO33_OUT 0x000f56, BIT1
303*53ee8cc1Swenshuai.xi #define GPIO33_IN  0x000f56, BIT2
304*53ee8cc1Swenshuai.xi 
305*53ee8cc1Swenshuai.xi #define GPIO34_PAD PAD_PM_GT0_RX_D1
306*53ee8cc1Swenshuai.xi #define GPIO34_OEN 0x000f58, BIT0
307*53ee8cc1Swenshuai.xi #define GPIO34_OUT 0x000f58, BIT1
308*53ee8cc1Swenshuai.xi #define GPIO34_IN  0x000f58, BIT2
309*53ee8cc1Swenshuai.xi 
310*53ee8cc1Swenshuai.xi #define GPIO35_PAD PAD_PM_GT0_RX_D2
311*53ee8cc1Swenshuai.xi #define GPIO35_OEN 0x000f5a, BIT0
312*53ee8cc1Swenshuai.xi #define GPIO35_OUT 0x000f5a, BIT1
313*53ee8cc1Swenshuai.xi #define GPIO35_IN  0x000f5a, BIT2
314*53ee8cc1Swenshuai.xi 
315*53ee8cc1Swenshuai.xi #define GPIO36_PAD PAD_PM_GT0_RX_D3
316*53ee8cc1Swenshuai.xi #define GPIO36_OEN 0x000f5c, BIT0
317*53ee8cc1Swenshuai.xi #define GPIO36_OUT 0x000f5c, BIT1
318*53ee8cc1Swenshuai.xi #define GPIO36_IN  0x000f5c, BIT2
319*53ee8cc1Swenshuai.xi 
320*53ee8cc1Swenshuai.xi #define GPIO37_PAD PAD_PM_GT0_TX_CLK
321*53ee8cc1Swenshuai.xi #define GPIO37_OEN 0x000f5e, BIT0
322*53ee8cc1Swenshuai.xi #define GPIO37_OUT 0x000f5e, BIT1
323*53ee8cc1Swenshuai.xi #define GPIO37_IN  0x000f5e, BIT2
324*53ee8cc1Swenshuai.xi 
325*53ee8cc1Swenshuai.xi #define GPIO38_PAD PAD_PM_GT0_TX_CTL
326*53ee8cc1Swenshuai.xi #define GPIO38_OEN 0x000f60, BIT0
327*53ee8cc1Swenshuai.xi #define GPIO38_OUT 0x000f60, BIT1
328*53ee8cc1Swenshuai.xi #define GPIO38_IN  0x000f60, BIT2
329*53ee8cc1Swenshuai.xi 
330*53ee8cc1Swenshuai.xi #define GPIO39_PAD PAD_PM_GT0_TX_D0
331*53ee8cc1Swenshuai.xi #define GPIO39_OEN 0x000f62, BIT0
332*53ee8cc1Swenshuai.xi #define GPIO39_OUT 0x000f62, BIT1
333*53ee8cc1Swenshuai.xi #define GPIO39_IN  0x000f62, BIT2
334*53ee8cc1Swenshuai.xi 
335*53ee8cc1Swenshuai.xi #define GPIO40_PAD PAD_PM_GT0_TX_D1
336*53ee8cc1Swenshuai.xi #define GPIO40_OEN 0x000f64, BIT0
337*53ee8cc1Swenshuai.xi #define GPIO40_OUT 0x000f64, BIT1
338*53ee8cc1Swenshuai.xi #define GPIO40_IN  0x000f64, BIT2
339*53ee8cc1Swenshuai.xi 
340*53ee8cc1Swenshuai.xi #define GPIO41_PAD PAD_PM_GT0_TX_D2
341*53ee8cc1Swenshuai.xi #define GPIO41_OEN 0x000f66, BIT0
342*53ee8cc1Swenshuai.xi #define GPIO41_OUT 0x000f66, BIT1
343*53ee8cc1Swenshuai.xi #define GPIO41_IN  0x000f66, BIT2
344*53ee8cc1Swenshuai.xi 
345*53ee8cc1Swenshuai.xi #define GPIO42_PAD PAD_PM_GT0_TX_D3
346*53ee8cc1Swenshuai.xi #define GPIO42_OEN 0x000f68, BIT0
347*53ee8cc1Swenshuai.xi #define GPIO42_OUT 0x000f68, BIT1
348*53ee8cc1Swenshuai.xi #define GPIO42_IN  0x000f68, BIT2
349*53ee8cc1Swenshuai.xi 
350*53ee8cc1Swenshuai.xi #define GPIO43_PAD PAD_PM_LED0
351*53ee8cc1Swenshuai.xi #define GPIO43_OEN 0x000f94, BIT0
352*53ee8cc1Swenshuai.xi #define GPIO43_OUT 0x000f94, BIT1
353*53ee8cc1Swenshuai.xi #define GPIO43_IN  0x000f94, BIT2
354*53ee8cc1Swenshuai.xi 
355*53ee8cc1Swenshuai.xi #define GPIO44_PAD PAD_PM_LED1
356*53ee8cc1Swenshuai.xi #define GPIO44_OEN 0x000f96, BIT0
357*53ee8cc1Swenshuai.xi #define GPIO44_OUT 0x000f96, BIT1
358*53ee8cc1Swenshuai.xi #define GPIO44_IN  0x000f96, BIT2
359*53ee8cc1Swenshuai.xi 
360*53ee8cc1Swenshuai.xi #define GPIO45_PAD PAD_SAR_GPIO0
361*53ee8cc1Swenshuai.xi #define GPIO45_OEN 0x001423, BIT0
362*53ee8cc1Swenshuai.xi #define GPIO45_OUT 0x001424, BIT0
363*53ee8cc1Swenshuai.xi #define GPIO45_IN  0x001425, BIT0
364*53ee8cc1Swenshuai.xi 
365*53ee8cc1Swenshuai.xi #define GPIO46_PAD PAD_SAR_GPIO1
366*53ee8cc1Swenshuai.xi #define GPIO46_OEN 0x001423, BIT1
367*53ee8cc1Swenshuai.xi #define GPIO46_OUT 0x001424, BIT1
368*53ee8cc1Swenshuai.xi #define GPIO46_IN  0x001425, BIT1
369*53ee8cc1Swenshuai.xi 
370*53ee8cc1Swenshuai.xi #define GPIO47_PAD PAD_SAR_GPIO2
371*53ee8cc1Swenshuai.xi #define GPIO47_OEN 0x001423, BIT2
372*53ee8cc1Swenshuai.xi #define GPIO47_OUT 0x001424, BIT2
373*53ee8cc1Swenshuai.xi #define GPIO47_IN  0x001425, BIT2
374*53ee8cc1Swenshuai.xi 
375*53ee8cc1Swenshuai.xi #define GPIO48_PAD PAD_SAR_GPIO3
376*53ee8cc1Swenshuai.xi #define GPIO48_OEN 0x001423, BIT3
377*53ee8cc1Swenshuai.xi #define GPIO48_OUT 0x001424, BIT3
378*53ee8cc1Swenshuai.xi #define GPIO48_IN  0x001425, BIT3
379*53ee8cc1Swenshuai.xi 
380*53ee8cc1Swenshuai.xi #define GPIO49_PAD PAD_SAR_GPIO4
381*53ee8cc1Swenshuai.xi #define GPIO49_OEN 0x001423, BIT4
382*53ee8cc1Swenshuai.xi #define GPIO49_OUT 0x001424, BIT4
383*53ee8cc1Swenshuai.xi #define GPIO49_IN  0x001425, BIT4
384*53ee8cc1Swenshuai.xi 
385*53ee8cc1Swenshuai.xi #define GPIO50_PAD PAD_VPLUG_DET
386*53ee8cc1Swenshuai.xi #define GPIO50_OEN 0x001423, BIT5
387*53ee8cc1Swenshuai.xi #define GPIO50_OUT 0x001424, BIT5
388*53ee8cc1Swenshuai.xi #define GPIO50_IN  0x001425, BIT5
389*53ee8cc1Swenshuai.xi 
390*53ee8cc1Swenshuai.xi #define GPIO51_PAD PAD_HSYNC_OUT
391*53ee8cc1Swenshuai.xi #define GPIO51_OEN 0x1025ec, BIT5
392*53ee8cc1Swenshuai.xi #define GPIO51_OUT 0x1025ec, BIT4
393*53ee8cc1Swenshuai.xi #define GPIO51_IN  0x1025ec, BIT0
394*53ee8cc1Swenshuai.xi 
395*53ee8cc1Swenshuai.xi #define GPIO52_PAD PAD_VSYNC_OUT
396*53ee8cc1Swenshuai.xi #define GPIO52_OEN 0x1025ee, BIT5
397*53ee8cc1Swenshuai.xi #define GPIO52_OUT 0x1025ee, BIT4
398*53ee8cc1Swenshuai.xi #define GPIO52_IN  0x1025ee, BIT0
399*53ee8cc1Swenshuai.xi 
400*53ee8cc1Swenshuai.xi #define GPIO53_PAD PAD_SD_CLK
401*53ee8cc1Swenshuai.xi #define GPIO53_OEN 0x1025a4, BIT5
402*53ee8cc1Swenshuai.xi #define GPIO53_OUT 0x1025a4, BIT4
403*53ee8cc1Swenshuai.xi #define GPIO53_IN  0x1025a4, BIT0
404*53ee8cc1Swenshuai.xi 
405*53ee8cc1Swenshuai.xi #define GPIO54_PAD PAD_SD_CMD
406*53ee8cc1Swenshuai.xi #define GPIO54_OEN 0x1025a6, BIT5
407*53ee8cc1Swenshuai.xi #define GPIO54_OUT 0x1025a6, BIT4
408*53ee8cc1Swenshuai.xi #define GPIO54_IN  0x1025a6, BIT0
409*53ee8cc1Swenshuai.xi 
410*53ee8cc1Swenshuai.xi #define GPIO55_PAD PAD_SD_D0
411*53ee8cc1Swenshuai.xi #define GPIO55_OEN 0x1025a8, BIT5
412*53ee8cc1Swenshuai.xi #define GPIO55_OUT 0x1025a8, BIT4
413*53ee8cc1Swenshuai.xi #define GPIO55_IN  0x1025a8, BIT0
414*53ee8cc1Swenshuai.xi 
415*53ee8cc1Swenshuai.xi #define GPIO56_PAD PAD_SD_D1
416*53ee8cc1Swenshuai.xi #define GPIO56_OEN 0x1025aa, BIT5
417*53ee8cc1Swenshuai.xi #define GPIO56_OUT 0x1025aa, BIT4
418*53ee8cc1Swenshuai.xi #define GPIO56_IN  0x1025aa, BIT0
419*53ee8cc1Swenshuai.xi 
420*53ee8cc1Swenshuai.xi #define GPIO57_PAD PAD_SD_D2
421*53ee8cc1Swenshuai.xi #define GPIO57_OEN 0x1025ac, BIT5
422*53ee8cc1Swenshuai.xi #define GPIO57_OUT 0x1025ac, BIT4
423*53ee8cc1Swenshuai.xi #define GPIO57_IN  0x1025ac, BIT0
424*53ee8cc1Swenshuai.xi 
425*53ee8cc1Swenshuai.xi #define GPIO58_PAD PAD_SD_D3
426*53ee8cc1Swenshuai.xi #define GPIO58_OEN 0x1025ae, BIT5
427*53ee8cc1Swenshuai.xi #define GPIO58_OUT 0x1025ae, BIT4
428*53ee8cc1Swenshuai.xi #define GPIO58_IN  0x1025ae, BIT0
429*53ee8cc1Swenshuai.xi 
430*53ee8cc1Swenshuai.xi #define GPIO59_PAD PAD_GPIO0
431*53ee8cc1Swenshuai.xi #define GPIO59_OEN 0x1025b0, BIT5
432*53ee8cc1Swenshuai.xi #define GPIO59_OUT 0x1025b0, BIT4
433*53ee8cc1Swenshuai.xi #define GPIO59_IN  0x1025b0, BIT0
434*53ee8cc1Swenshuai.xi 
435*53ee8cc1Swenshuai.xi #define GPIO60_PAD PAD_GPIO1
436*53ee8cc1Swenshuai.xi #define GPIO60_OEN 0x1025b2, BIT5
437*53ee8cc1Swenshuai.xi #define GPIO60_OUT 0x1025b2, BIT4
438*53ee8cc1Swenshuai.xi #define GPIO60_IN  0x1025b2, BIT0
439*53ee8cc1Swenshuai.xi 
440*53ee8cc1Swenshuai.xi #define GPIO61_PAD PAD_GPIO2
441*53ee8cc1Swenshuai.xi #define GPIO61_OEN 0x1025b4, BIT5
442*53ee8cc1Swenshuai.xi #define GPIO61_OUT 0x1025b4, BIT4
443*53ee8cc1Swenshuai.xi #define GPIO61_IN  0x1025b4, BIT0
444*53ee8cc1Swenshuai.xi 
445*53ee8cc1Swenshuai.xi #define GPIO62_PAD PAD_GPIO3
446*53ee8cc1Swenshuai.xi #define GPIO62_OEN 0x1025b6, BIT5
447*53ee8cc1Swenshuai.xi #define GPIO62_OUT 0x1025b6, BIT4
448*53ee8cc1Swenshuai.xi #define GPIO62_IN  0x1025b6, BIT0
449*53ee8cc1Swenshuai.xi 
450*53ee8cc1Swenshuai.xi #define GPIO63_PAD PAD_GPIO4
451*53ee8cc1Swenshuai.xi #define GPIO63_OEN 0x1025b8, BIT5
452*53ee8cc1Swenshuai.xi #define GPIO63_OUT 0x1025b8, BIT4
453*53ee8cc1Swenshuai.xi #define GPIO63_IN  0x1025b8, BIT0
454*53ee8cc1Swenshuai.xi 
455*53ee8cc1Swenshuai.xi #define GPIO64_PAD PAD_GPIO5
456*53ee8cc1Swenshuai.xi #define GPIO64_OEN 0x1025ba, BIT5
457*53ee8cc1Swenshuai.xi #define GPIO64_OUT 0x1025ba, BIT4
458*53ee8cc1Swenshuai.xi #define GPIO64_IN  0x1025ba, BIT0
459*53ee8cc1Swenshuai.xi 
460*53ee8cc1Swenshuai.xi #define GPIO65_PAD PAD_GPIO6
461*53ee8cc1Swenshuai.xi #define GPIO65_OEN 0x1025bc, BIT5
462*53ee8cc1Swenshuai.xi #define GPIO65_OUT 0x1025bc, BIT4
463*53ee8cc1Swenshuai.xi #define GPIO65_IN  0x1025bc, BIT0
464*53ee8cc1Swenshuai.xi 
465*53ee8cc1Swenshuai.xi #define GPIO66_PAD PAD_GPIO7
466*53ee8cc1Swenshuai.xi #define GPIO66_OEN 0x1025be, BIT5
467*53ee8cc1Swenshuai.xi #define GPIO66_OUT 0x1025be, BIT4
468*53ee8cc1Swenshuai.xi #define GPIO66_IN  0x1025be, BIT0
469*53ee8cc1Swenshuai.xi 
470*53ee8cc1Swenshuai.xi #define GPIO67_PAD PAD_GPIO8
471*53ee8cc1Swenshuai.xi #define GPIO67_OEN 0x1025c0, BIT5
472*53ee8cc1Swenshuai.xi #define GPIO67_OUT 0x1025c0, BIT4
473*53ee8cc1Swenshuai.xi #define GPIO67_IN  0x1025c0, BIT0
474*53ee8cc1Swenshuai.xi 
475*53ee8cc1Swenshuai.xi #define GPIO68_PAD PAD_GPIO9
476*53ee8cc1Swenshuai.xi #define GPIO68_OEN 0x1025c2, BIT5
477*53ee8cc1Swenshuai.xi #define GPIO68_OUT 0x1025c2, BIT4
478*53ee8cc1Swenshuai.xi #define GPIO68_IN  0x1025c2, BIT0
479*53ee8cc1Swenshuai.xi 
480*53ee8cc1Swenshuai.xi #define GPIO69_PAD PAD_SM0_CLK
481*53ee8cc1Swenshuai.xi #define GPIO69_OEN 0x102500, BIT5
482*53ee8cc1Swenshuai.xi #define GPIO69_OUT 0x102500, BIT4
483*53ee8cc1Swenshuai.xi #define GPIO69_IN  0x102500, BIT0
484*53ee8cc1Swenshuai.xi 
485*53ee8cc1Swenshuai.xi #define GPIO70_PAD PAD_SM0_RST
486*53ee8cc1Swenshuai.xi #define GPIO70_OEN 0x102502, BIT5
487*53ee8cc1Swenshuai.xi #define GPIO70_OUT 0x102502, BIT4
488*53ee8cc1Swenshuai.xi #define GPIO70_IN  0x102502, BIT0
489*53ee8cc1Swenshuai.xi 
490*53ee8cc1Swenshuai.xi #define GPIO71_PAD PAD_SM0_VCC
491*53ee8cc1Swenshuai.xi #define GPIO71_OEN 0x102504, BIT5
492*53ee8cc1Swenshuai.xi #define GPIO71_OUT 0x102504, BIT4
493*53ee8cc1Swenshuai.xi #define GPIO71_IN  0x102504, BIT0
494*53ee8cc1Swenshuai.xi 
495*53ee8cc1Swenshuai.xi #define GPIO72_PAD PAD_SM0_CD
496*53ee8cc1Swenshuai.xi #define GPIO72_OEN 0x102506, BIT5
497*53ee8cc1Swenshuai.xi #define GPIO72_OUT 0x102506, BIT4
498*53ee8cc1Swenshuai.xi #define GPIO72_IN  0x102506, BIT0
499*53ee8cc1Swenshuai.xi 
500*53ee8cc1Swenshuai.xi #define GPIO73_PAD PAD_SM0_IO
501*53ee8cc1Swenshuai.xi #define GPIO73_OEN 0x102508, BIT5
502*53ee8cc1Swenshuai.xi #define GPIO73_OUT 0x102508, BIT4
503*53ee8cc1Swenshuai.xi #define GPIO73_IN  0x102508, BIT0
504*53ee8cc1Swenshuai.xi 
505*53ee8cc1Swenshuai.xi #define GPIO74_PAD PAD_SM0_VSEL
506*53ee8cc1Swenshuai.xi #define GPIO74_OEN 0x10250a, BIT5
507*53ee8cc1Swenshuai.xi #define GPIO74_OUT 0x10250a, BIT4
508*53ee8cc1Swenshuai.xi #define GPIO74_IN  0x10250a, BIT0
509*53ee8cc1Swenshuai.xi 
510*53ee8cc1Swenshuai.xi #define GPIO75_PAD PAD_SM0_C4
511*53ee8cc1Swenshuai.xi #define GPIO75_OEN 0x10250c, BIT5
512*53ee8cc1Swenshuai.xi #define GPIO75_OUT 0x10250c, BIT4
513*53ee8cc1Swenshuai.xi #define GPIO75_IN  0x10250c, BIT0
514*53ee8cc1Swenshuai.xi 
515*53ee8cc1Swenshuai.xi #define GPIO76_PAD PAD_SM0_C8
516*53ee8cc1Swenshuai.xi #define GPIO76_OEN 0x10250d, BIT5
517*53ee8cc1Swenshuai.xi #define GPIO76_OUT 0x10250d, BIT4
518*53ee8cc1Swenshuai.xi #define GPIO76_IN  0x10250d, BIT0
519*53ee8cc1Swenshuai.xi 
520*53ee8cc1Swenshuai.xi #define GPIO77_PAD PAD_CI_RST
521*53ee8cc1Swenshuai.xi #define GPIO77_OEN 0x10269a, BIT5
522*53ee8cc1Swenshuai.xi #define GPIO77_OUT 0x10269a, BIT4
523*53ee8cc1Swenshuai.xi #define GPIO77_IN  0x10269a, BIT0
524*53ee8cc1Swenshuai.xi 
525*53ee8cc1Swenshuai.xi #define GPIO78_PAD PAD_CI_WAITZ
526*53ee8cc1Swenshuai.xi #define GPIO78_OEN 0x10269c, BIT5
527*53ee8cc1Swenshuai.xi #define GPIO78_OUT 0x10269c, BIT4
528*53ee8cc1Swenshuai.xi #define GPIO78_IN  0x10269c, BIT0
529*53ee8cc1Swenshuai.xi 
530*53ee8cc1Swenshuai.xi #define GPIO79_PAD PAD_CI_IRQAZ
531*53ee8cc1Swenshuai.xi #define GPIO79_OEN 0x10269e, BIT5
532*53ee8cc1Swenshuai.xi #define GPIO79_OUT 0x10269e, BIT4
533*53ee8cc1Swenshuai.xi #define GPIO79_IN  0x10269e, BIT0
534*53ee8cc1Swenshuai.xi 
535*53ee8cc1Swenshuai.xi #define GPIO80_PAD PAD_CI_IORDZ
536*53ee8cc1Swenshuai.xi #define GPIO80_OEN 0x1026a0, BIT5
537*53ee8cc1Swenshuai.xi #define GPIO80_OUT 0x1026a0, BIT4
538*53ee8cc1Swenshuai.xi #define GPIO80_IN  0x1026a0, BIT0
539*53ee8cc1Swenshuai.xi 
540*53ee8cc1Swenshuai.xi #define GPIO81_PAD PAD_CI_REGZ
541*53ee8cc1Swenshuai.xi #define GPIO81_OEN 0x1026a2, BIT5
542*53ee8cc1Swenshuai.xi #define GPIO81_OUT 0x1026a2, BIT4
543*53ee8cc1Swenshuai.xi #define GPIO81_IN  0x1026a2, BIT0
544*53ee8cc1Swenshuai.xi 
545*53ee8cc1Swenshuai.xi #define GPIO82_PAD PAD_CI_WEZ
546*53ee8cc1Swenshuai.xi #define GPIO82_OEN 0x1026a4, BIT5
547*53ee8cc1Swenshuai.xi #define GPIO82_OUT 0x1026a4, BIT4
548*53ee8cc1Swenshuai.xi #define GPIO82_IN  0x1026a4, BIT0
549*53ee8cc1Swenshuai.xi 
550*53ee8cc1Swenshuai.xi #define GPIO83_PAD PAD_CI_IOWRZ
551*53ee8cc1Swenshuai.xi #define GPIO83_OEN 0x1026a6, BIT5
552*53ee8cc1Swenshuai.xi #define GPIO83_OUT 0x1026a6, BIT4
553*53ee8cc1Swenshuai.xi #define GPIO83_IN  0x1026a6, BIT0
554*53ee8cc1Swenshuai.xi 
555*53ee8cc1Swenshuai.xi #define GPIO84_PAD PAD_CI_CEZ
556*53ee8cc1Swenshuai.xi #define GPIO84_OEN 0x1026a8, BIT5
557*53ee8cc1Swenshuai.xi #define GPIO84_OUT 0x1026a8, BIT4
558*53ee8cc1Swenshuai.xi #define GPIO84_IN  0x1026a8, BIT0
559*53ee8cc1Swenshuai.xi 
560*53ee8cc1Swenshuai.xi #define GPIO85_PAD PAD_CI_OEZ
561*53ee8cc1Swenshuai.xi #define GPIO85_OEN 0x1026aa, BIT5
562*53ee8cc1Swenshuai.xi #define GPIO85_OUT 0x1026aa, BIT4
563*53ee8cc1Swenshuai.xi #define GPIO85_IN  0x1026aa, BIT0
564*53ee8cc1Swenshuai.xi 
565*53ee8cc1Swenshuai.xi #define GPIO86_PAD PAD_CI_CDZ
566*53ee8cc1Swenshuai.xi #define GPIO86_OEN 0x1026ac, BIT5
567*53ee8cc1Swenshuai.xi #define GPIO86_OUT 0x1026ac, BIT4
568*53ee8cc1Swenshuai.xi #define GPIO86_IN  0x1026ac, BIT0
569*53ee8cc1Swenshuai.xi 
570*53ee8cc1Swenshuai.xi #define GPIO87_PAD PAD_CI_A0
571*53ee8cc1Swenshuai.xi #define GPIO87_OEN 0x1026ae, BIT5
572*53ee8cc1Swenshuai.xi #define GPIO87_OUT 0x1026ae, BIT4
573*53ee8cc1Swenshuai.xi #define GPIO87_IN  0x1026ae, BIT0
574*53ee8cc1Swenshuai.xi 
575*53ee8cc1Swenshuai.xi #define GPIO88_PAD PAD_CI_A1
576*53ee8cc1Swenshuai.xi #define GPIO88_OEN 0x1026b0, BIT5
577*53ee8cc1Swenshuai.xi #define GPIO88_OUT 0x1026b0, BIT4
578*53ee8cc1Swenshuai.xi #define GPIO88_IN  0x1026b0, BIT0
579*53ee8cc1Swenshuai.xi 
580*53ee8cc1Swenshuai.xi #define GPIO89_PAD PAD_CI_A2
581*53ee8cc1Swenshuai.xi #define GPIO89_OEN 0x1026b2, BIT5
582*53ee8cc1Swenshuai.xi #define GPIO89_OUT 0x1026b2, BIT4
583*53ee8cc1Swenshuai.xi #define GPIO89_IN  0x1026b2, BIT0
584*53ee8cc1Swenshuai.xi 
585*53ee8cc1Swenshuai.xi #define GPIO90_PAD PAD_CI_A3
586*53ee8cc1Swenshuai.xi #define GPIO90_OEN 0x1026b4, BIT5
587*53ee8cc1Swenshuai.xi #define GPIO90_OUT 0x1026b4, BIT4
588*53ee8cc1Swenshuai.xi #define GPIO90_IN  0x1026b4, BIT0
589*53ee8cc1Swenshuai.xi 
590*53ee8cc1Swenshuai.xi #define GPIO91_PAD PAD_CI_A4
591*53ee8cc1Swenshuai.xi #define GPIO91_OEN 0x1026b6, BIT5
592*53ee8cc1Swenshuai.xi #define GPIO91_OUT 0x1026b6, BIT4
593*53ee8cc1Swenshuai.xi #define GPIO91_IN  0x1026b6, BIT0
594*53ee8cc1Swenshuai.xi 
595*53ee8cc1Swenshuai.xi #define GPIO92_PAD PAD_CI_A5
596*53ee8cc1Swenshuai.xi #define GPIO92_OEN 0x1026b8, BIT5
597*53ee8cc1Swenshuai.xi #define GPIO92_OUT 0x1026b8, BIT4
598*53ee8cc1Swenshuai.xi #define GPIO92_IN  0x1026b8, BIT0
599*53ee8cc1Swenshuai.xi 
600*53ee8cc1Swenshuai.xi #define GPIO93_PAD PAD_CI_A6
601*53ee8cc1Swenshuai.xi #define GPIO93_OEN 0x1026ba, BIT5
602*53ee8cc1Swenshuai.xi #define GPIO93_OUT 0x1026ba, BIT4
603*53ee8cc1Swenshuai.xi #define GPIO93_IN  0x1026ba, BIT0
604*53ee8cc1Swenshuai.xi 
605*53ee8cc1Swenshuai.xi #define GPIO94_PAD PAD_CI_A7
606*53ee8cc1Swenshuai.xi #define GPIO94_OEN 0x1026bc, BIT5
607*53ee8cc1Swenshuai.xi #define GPIO94_OUT 0x1026bc, BIT4
608*53ee8cc1Swenshuai.xi #define GPIO94_IN  0x1026bc, BIT0
609*53ee8cc1Swenshuai.xi 
610*53ee8cc1Swenshuai.xi #define GPIO95_PAD PAD_CI_A8
611*53ee8cc1Swenshuai.xi #define GPIO95_OEN 0x1026be, BIT5
612*53ee8cc1Swenshuai.xi #define GPIO95_OUT 0x1026be, BIT4
613*53ee8cc1Swenshuai.xi #define GPIO95_IN  0x1026be, BIT0
614*53ee8cc1Swenshuai.xi 
615*53ee8cc1Swenshuai.xi #define GPIO96_PAD PAD_CI_A9
616*53ee8cc1Swenshuai.xi #define GPIO96_OEN 0x1026c0, BIT5
617*53ee8cc1Swenshuai.xi #define GPIO96_OUT 0x1026c0, BIT4
618*53ee8cc1Swenshuai.xi #define GPIO96_IN  0x1026c0, BIT0
619*53ee8cc1Swenshuai.xi 
620*53ee8cc1Swenshuai.xi #define GPIO97_PAD PAD_CI_A10
621*53ee8cc1Swenshuai.xi #define GPIO97_OEN 0x1026c2, BIT5
622*53ee8cc1Swenshuai.xi #define GPIO97_OUT 0x1026c2, BIT4
623*53ee8cc1Swenshuai.xi #define GPIO97_IN  0x1026c2, BIT0
624*53ee8cc1Swenshuai.xi 
625*53ee8cc1Swenshuai.xi #define GPIO98_PAD PAD_CI_A11
626*53ee8cc1Swenshuai.xi #define GPIO98_OEN 0x1026c4, BIT5
627*53ee8cc1Swenshuai.xi #define GPIO98_OUT 0x1026c4, BIT4
628*53ee8cc1Swenshuai.xi #define GPIO98_IN  0x1026c4, BIT0
629*53ee8cc1Swenshuai.xi 
630*53ee8cc1Swenshuai.xi #define GPIO99_PAD PAD_CI_A12
631*53ee8cc1Swenshuai.xi #define GPIO99_OEN 0x1026c6, BIT5
632*53ee8cc1Swenshuai.xi #define GPIO99_OUT 0x1026c6, BIT4
633*53ee8cc1Swenshuai.xi #define GPIO99_IN  0x1026c6, BIT0
634*53ee8cc1Swenshuai.xi 
635*53ee8cc1Swenshuai.xi #define GPIO100_PAD PAD_CI_A13
636*53ee8cc1Swenshuai.xi #define GPIO100_OEN 0x1026c8, BIT5
637*53ee8cc1Swenshuai.xi #define GPIO100_OUT 0x1026c8, BIT4
638*53ee8cc1Swenshuai.xi #define GPIO100_IN  0x1026c8, BIT0
639*53ee8cc1Swenshuai.xi 
640*53ee8cc1Swenshuai.xi #define GPIO101_PAD PAD_CI_A14
641*53ee8cc1Swenshuai.xi #define GPIO101_OEN 0x1026ca, BIT5
642*53ee8cc1Swenshuai.xi #define GPIO101_OUT 0x1026ca, BIT4
643*53ee8cc1Swenshuai.xi #define GPIO101_IN  0x1026ca, BIT0
644*53ee8cc1Swenshuai.xi 
645*53ee8cc1Swenshuai.xi #define GPIO102_PAD PAD_CI_D0
646*53ee8cc1Swenshuai.xi #define GPIO102_OEN 0x1026cc, BIT5
647*53ee8cc1Swenshuai.xi #define GPIO102_OUT 0x1026cc, BIT4
648*53ee8cc1Swenshuai.xi #define GPIO102_IN  0x1026cc, BIT0
649*53ee8cc1Swenshuai.xi 
650*53ee8cc1Swenshuai.xi #define GPIO103_PAD PAD_CI_D1
651*53ee8cc1Swenshuai.xi #define GPIO103_OEN 0x1026ce, BIT5
652*53ee8cc1Swenshuai.xi #define GPIO103_OUT 0x1026ce, BIT4
653*53ee8cc1Swenshuai.xi #define GPIO103_IN  0x1026ce, BIT0
654*53ee8cc1Swenshuai.xi 
655*53ee8cc1Swenshuai.xi #define GPIO104_PAD PAD_CI_D2
656*53ee8cc1Swenshuai.xi #define GPIO104_OEN 0x1026d0, BIT5
657*53ee8cc1Swenshuai.xi #define GPIO104_OUT 0x1026d0, BIT4
658*53ee8cc1Swenshuai.xi #define GPIO104_IN  0x1026d0, BIT0
659*53ee8cc1Swenshuai.xi 
660*53ee8cc1Swenshuai.xi #define GPIO105_PAD PAD_CI_D3
661*53ee8cc1Swenshuai.xi #define GPIO105_OEN 0x1026d2, BIT5
662*53ee8cc1Swenshuai.xi #define GPIO105_OUT 0x1026d2, BIT4
663*53ee8cc1Swenshuai.xi #define GPIO105_IN  0x1026d2, BIT0
664*53ee8cc1Swenshuai.xi 
665*53ee8cc1Swenshuai.xi #define GPIO106_PAD PAD_CI_D4
666*53ee8cc1Swenshuai.xi #define GPIO106_OEN 0x1026d4, BIT5
667*53ee8cc1Swenshuai.xi #define GPIO106_OUT 0x1026d4, BIT4
668*53ee8cc1Swenshuai.xi #define GPIO106_IN  0x1026d4, BIT0
669*53ee8cc1Swenshuai.xi 
670*53ee8cc1Swenshuai.xi #define GPIO107_PAD PAD_CI_D5
671*53ee8cc1Swenshuai.xi #define GPIO107_OEN 0x1026d6, BIT5
672*53ee8cc1Swenshuai.xi #define GPIO107_OUT 0x1026d6, BIT4
673*53ee8cc1Swenshuai.xi #define GPIO107_IN  0x1026d6, BIT0
674*53ee8cc1Swenshuai.xi 
675*53ee8cc1Swenshuai.xi #define GPIO108_PAD PAD_CI_D6
676*53ee8cc1Swenshuai.xi #define GPIO108_OEN 0x1026d8, BIT5
677*53ee8cc1Swenshuai.xi #define GPIO108_OUT 0x1026d8, BIT4
678*53ee8cc1Swenshuai.xi #define GPIO108_IN  0x1026d8, BIT0
679*53ee8cc1Swenshuai.xi 
680*53ee8cc1Swenshuai.xi #define GPIO109_PAD PAD_CI_D7
681*53ee8cc1Swenshuai.xi #define GPIO109_OEN 0x1026da, BIT5
682*53ee8cc1Swenshuai.xi #define GPIO109_OUT 0x1026da, BIT4
683*53ee8cc1Swenshuai.xi #define GPIO109_IN  0x1026da, BIT0
684*53ee8cc1Swenshuai.xi 
685*53ee8cc1Swenshuai.xi #define GPIO110_PAD PAD_TS0_CLK
686*53ee8cc1Swenshuai.xi #define GPIO110_OEN 0x102524, BIT5
687*53ee8cc1Swenshuai.xi #define GPIO110_OUT 0x102524, BIT4
688*53ee8cc1Swenshuai.xi #define GPIO110_IN  0x102524, BIT0
689*53ee8cc1Swenshuai.xi 
690*53ee8cc1Swenshuai.xi #define GPIO111_PAD PAD_TS0_SYNC
691*53ee8cc1Swenshuai.xi #define GPIO111_OEN 0x102526, BIT5
692*53ee8cc1Swenshuai.xi #define GPIO111_OUT 0x102526, BIT4
693*53ee8cc1Swenshuai.xi #define GPIO111_IN  0x102526, BIT0
694*53ee8cc1Swenshuai.xi 
695*53ee8cc1Swenshuai.xi #define GPIO112_PAD PAD_TS0_VLD
696*53ee8cc1Swenshuai.xi #define GPIO112_OEN 0x102528, BIT5
697*53ee8cc1Swenshuai.xi #define GPIO112_OUT 0x102528, BIT4
698*53ee8cc1Swenshuai.xi #define GPIO112_IN  0x102528, BIT0
699*53ee8cc1Swenshuai.xi 
700*53ee8cc1Swenshuai.xi #define GPIO113_PAD PAD_TS0_D0
701*53ee8cc1Swenshuai.xi #define GPIO113_OEN 0x10252a, BIT5
702*53ee8cc1Swenshuai.xi #define GPIO113_OUT 0x10252a, BIT4
703*53ee8cc1Swenshuai.xi #define GPIO113_IN  0x10252a, BIT0
704*53ee8cc1Swenshuai.xi 
705*53ee8cc1Swenshuai.xi #define GPIO114_PAD PAD_TS0_D1
706*53ee8cc1Swenshuai.xi #define GPIO114_OEN 0x10252c, BIT5
707*53ee8cc1Swenshuai.xi #define GPIO114_OUT 0x10252c, BIT4
708*53ee8cc1Swenshuai.xi #define GPIO114_IN  0x10252c, BIT0
709*53ee8cc1Swenshuai.xi 
710*53ee8cc1Swenshuai.xi #define GPIO115_PAD PAD_TS0_D2
711*53ee8cc1Swenshuai.xi #define GPIO115_OEN 0x10252e, BIT5
712*53ee8cc1Swenshuai.xi #define GPIO115_OUT 0x10252e, BIT4
713*53ee8cc1Swenshuai.xi #define GPIO115_IN  0x10252e, BIT0
714*53ee8cc1Swenshuai.xi 
715*53ee8cc1Swenshuai.xi #define GPIO116_PAD PAD_TS0_D3
716*53ee8cc1Swenshuai.xi #define GPIO116_OEN 0x102530, BIT5
717*53ee8cc1Swenshuai.xi #define GPIO116_OUT 0x102530, BIT4
718*53ee8cc1Swenshuai.xi #define GPIO116_IN  0x102530, BIT0
719*53ee8cc1Swenshuai.xi 
720*53ee8cc1Swenshuai.xi #define GPIO117_PAD PAD_TS0_D4
721*53ee8cc1Swenshuai.xi #define GPIO117_OEN 0x102532, BIT5
722*53ee8cc1Swenshuai.xi #define GPIO117_OUT 0x102532, BIT4
723*53ee8cc1Swenshuai.xi #define GPIO117_IN  0x102532, BIT0
724*53ee8cc1Swenshuai.xi 
725*53ee8cc1Swenshuai.xi #define GPIO118_PAD PAD_TS0_D5
726*53ee8cc1Swenshuai.xi #define GPIO118_OEN 0x102534, BIT5
727*53ee8cc1Swenshuai.xi #define GPIO118_OUT 0x102534, BIT4
728*53ee8cc1Swenshuai.xi #define GPIO118_IN  0x102534, BIT0
729*53ee8cc1Swenshuai.xi 
730*53ee8cc1Swenshuai.xi #define GPIO119_PAD PAD_TS0_D6
731*53ee8cc1Swenshuai.xi #define GPIO119_OEN 0x102536, BIT5
732*53ee8cc1Swenshuai.xi #define GPIO119_OUT 0x102536, BIT4
733*53ee8cc1Swenshuai.xi #define GPIO119_IN  0x102536, BIT0
734*53ee8cc1Swenshuai.xi 
735*53ee8cc1Swenshuai.xi #define GPIO120_PAD PAD_TS0_D7
736*53ee8cc1Swenshuai.xi #define GPIO120_OEN 0x102538, BIT5
737*53ee8cc1Swenshuai.xi #define GPIO120_OUT 0x102538, BIT4
738*53ee8cc1Swenshuai.xi #define GPIO120_IN  0x102538, BIT0
739*53ee8cc1Swenshuai.xi 
740*53ee8cc1Swenshuai.xi #define GPIO121_PAD PAD_TS1_CLK
741*53ee8cc1Swenshuai.xi #define GPIO121_OEN 0x10263a, BIT5
742*53ee8cc1Swenshuai.xi #define GPIO121_OUT 0x10263a, BIT4
743*53ee8cc1Swenshuai.xi #define GPIO121_IN  0x10263a, BIT0
744*53ee8cc1Swenshuai.xi 
745*53ee8cc1Swenshuai.xi #define GPIO122_PAD PAD_TS1_SYNC
746*53ee8cc1Swenshuai.xi #define GPIO122_OEN 0x10263c, BIT5
747*53ee8cc1Swenshuai.xi #define GPIO122_OUT 0x10263c, BIT4
748*53ee8cc1Swenshuai.xi #define GPIO122_IN  0x10263c, BIT0
749*53ee8cc1Swenshuai.xi 
750*53ee8cc1Swenshuai.xi #define GPIO123_PAD PAD_TS1_VLD
751*53ee8cc1Swenshuai.xi #define GPIO123_OEN 0x10263e, BIT5
752*53ee8cc1Swenshuai.xi #define GPIO123_OUT 0x10263e, BIT4
753*53ee8cc1Swenshuai.xi #define GPIO123_IN  0x10263e, BIT0
754*53ee8cc1Swenshuai.xi 
755*53ee8cc1Swenshuai.xi #define GPIO124_PAD PAD_TS1_D0
756*53ee8cc1Swenshuai.xi #define GPIO124_OEN 0x102640, BIT5
757*53ee8cc1Swenshuai.xi #define GPIO124_OUT 0x102640, BIT4
758*53ee8cc1Swenshuai.xi #define GPIO124_IN  0x102640, BIT0
759*53ee8cc1Swenshuai.xi 
760*53ee8cc1Swenshuai.xi #define GPIO125_PAD PAD_TS1_D1
761*53ee8cc1Swenshuai.xi #define GPIO125_OEN 0x102642, BIT5
762*53ee8cc1Swenshuai.xi #define GPIO125_OUT 0x102642, BIT4
763*53ee8cc1Swenshuai.xi #define GPIO125_IN  0x102642, BIT0
764*53ee8cc1Swenshuai.xi 
765*53ee8cc1Swenshuai.xi #define GPIO126_PAD PAD_TS1_D2
766*53ee8cc1Swenshuai.xi #define GPIO126_OEN 0x102644, BIT5
767*53ee8cc1Swenshuai.xi #define GPIO126_OUT 0x102644, BIT4
768*53ee8cc1Swenshuai.xi #define GPIO126_IN  0x102644, BIT0
769*53ee8cc1Swenshuai.xi 
770*53ee8cc1Swenshuai.xi #define GPIO127_PAD PAD_TS1_D3
771*53ee8cc1Swenshuai.xi #define GPIO127_OEN 0x102646, BIT5
772*53ee8cc1Swenshuai.xi #define GPIO127_OUT 0x102646, BIT4
773*53ee8cc1Swenshuai.xi #define GPIO127_IN  0x102646, BIT0
774*53ee8cc1Swenshuai.xi 
775*53ee8cc1Swenshuai.xi #define GPIO128_PAD PAD_TS1_D4
776*53ee8cc1Swenshuai.xi #define GPIO128_OEN 0x102648, BIT5
777*53ee8cc1Swenshuai.xi #define GPIO128_OUT 0x102648, BIT4
778*53ee8cc1Swenshuai.xi #define GPIO128_IN  0x102648, BIT0
779*53ee8cc1Swenshuai.xi 
780*53ee8cc1Swenshuai.xi #define GPIO129_PAD PAD_TS1_D5
781*53ee8cc1Swenshuai.xi #define GPIO129_OEN 0x10264a, BIT5
782*53ee8cc1Swenshuai.xi #define GPIO129_OUT 0x10264a, BIT4
783*53ee8cc1Swenshuai.xi #define GPIO129_IN  0x10264a, BIT0
784*53ee8cc1Swenshuai.xi 
785*53ee8cc1Swenshuai.xi #define GPIO130_PAD PAD_TS1_D6
786*53ee8cc1Swenshuai.xi #define GPIO130_OEN 0x10264c, BIT5
787*53ee8cc1Swenshuai.xi #define GPIO130_OUT 0x10264c, BIT4
788*53ee8cc1Swenshuai.xi #define GPIO130_IN  0x10264c, BIT0
789*53ee8cc1Swenshuai.xi 
790*53ee8cc1Swenshuai.xi #define GPIO131_PAD PAD_TS1_D7
791*53ee8cc1Swenshuai.xi #define GPIO131_OEN 0x10264e, BIT5
792*53ee8cc1Swenshuai.xi #define GPIO131_OUT 0x10264e, BIT4
793*53ee8cc1Swenshuai.xi #define GPIO131_IN  0x10264e, BIT0
794*53ee8cc1Swenshuai.xi 
795*53ee8cc1Swenshuai.xi #define GPIO132_PAD PAD_TS2_CLK
796*53ee8cc1Swenshuai.xi #define GPIO132_OEN 0x102650, BIT5
797*53ee8cc1Swenshuai.xi #define GPIO132_OUT 0x102650, BIT4
798*53ee8cc1Swenshuai.xi #define GPIO132_IN  0x102650, BIT0
799*53ee8cc1Swenshuai.xi 
800*53ee8cc1Swenshuai.xi #define GPIO133_PAD PAD_TS2_SYNC
801*53ee8cc1Swenshuai.xi #define GPIO133_OEN 0x102652, BIT5
802*53ee8cc1Swenshuai.xi #define GPIO133_OUT 0x102652, BIT4
803*53ee8cc1Swenshuai.xi #define GPIO133_IN  0x102652, BIT0
804*53ee8cc1Swenshuai.xi 
805*53ee8cc1Swenshuai.xi #define GPIO134_PAD PAD_TS2_VLD
806*53ee8cc1Swenshuai.xi #define GPIO134_OEN 0x102654, BIT5
807*53ee8cc1Swenshuai.xi #define GPIO134_OUT 0x102654, BIT4
808*53ee8cc1Swenshuai.xi #define GPIO134_IN  0x102654, BIT0
809*53ee8cc1Swenshuai.xi 
810*53ee8cc1Swenshuai.xi #define GPIO135_PAD PAD_TS2_D0
811*53ee8cc1Swenshuai.xi #define GPIO135_OEN 0x102656, BIT5
812*53ee8cc1Swenshuai.xi #define GPIO135_OUT 0x102656, BIT4
813*53ee8cc1Swenshuai.xi #define GPIO135_IN  0x102656, BIT0
814*53ee8cc1Swenshuai.xi 
815*53ee8cc1Swenshuai.xi #define GPIO136_PAD PAD_TS2_D1
816*53ee8cc1Swenshuai.xi #define GPIO136_OEN 0x102658, BIT5
817*53ee8cc1Swenshuai.xi #define GPIO136_OUT 0x102658, BIT4
818*53ee8cc1Swenshuai.xi #define GPIO136_IN  0x102658, BIT0
819*53ee8cc1Swenshuai.xi 
820*53ee8cc1Swenshuai.xi #define GPIO137_PAD PAD_TS2_D2
821*53ee8cc1Swenshuai.xi #define GPIO137_OEN 0x10265a, BIT5
822*53ee8cc1Swenshuai.xi #define GPIO137_OUT 0x10265a, BIT4
823*53ee8cc1Swenshuai.xi #define GPIO137_IN  0x10265a, BIT0
824*53ee8cc1Swenshuai.xi 
825*53ee8cc1Swenshuai.xi #define GPIO138_PAD PAD_TS2_D3
826*53ee8cc1Swenshuai.xi #define GPIO138_OEN 0x10265c, BIT5
827*53ee8cc1Swenshuai.xi #define GPIO138_OUT 0x10265c, BIT4
828*53ee8cc1Swenshuai.xi #define GPIO138_IN  0x10265c, BIT0
829*53ee8cc1Swenshuai.xi 
830*53ee8cc1Swenshuai.xi #define GPIO139_PAD PAD_TS2_D4
831*53ee8cc1Swenshuai.xi #define GPIO139_OEN 0x10265e, BIT5
832*53ee8cc1Swenshuai.xi #define GPIO139_OUT 0x10265e, BIT4
833*53ee8cc1Swenshuai.xi #define GPIO139_IN  0x10265e, BIT0
834*53ee8cc1Swenshuai.xi 
835*53ee8cc1Swenshuai.xi #define GPIO140_PAD PAD_TS2_D5
836*53ee8cc1Swenshuai.xi #define GPIO140_OEN 0x102660, BIT5
837*53ee8cc1Swenshuai.xi #define GPIO140_OUT 0x102660, BIT4
838*53ee8cc1Swenshuai.xi #define GPIO140_IN  0x102660, BIT0
839*53ee8cc1Swenshuai.xi 
840*53ee8cc1Swenshuai.xi #define GPIO141_PAD PAD_TS2_D6
841*53ee8cc1Swenshuai.xi #define GPIO141_OEN 0x102662, BIT5
842*53ee8cc1Swenshuai.xi #define GPIO141_OUT 0x102662, BIT4
843*53ee8cc1Swenshuai.xi #define GPIO141_IN  0x102662, BIT0
844*53ee8cc1Swenshuai.xi 
845*53ee8cc1Swenshuai.xi #define GPIO142_PAD PAD_TS2_D7
846*53ee8cc1Swenshuai.xi #define GPIO142_OEN 0x102664, BIT5
847*53ee8cc1Swenshuai.xi #define GPIO142_OUT 0x102664, BIT4
848*53ee8cc1Swenshuai.xi #define GPIO142_IN  0x102664, BIT0
849*53ee8cc1Swenshuai.xi 
850*53ee8cc1Swenshuai.xi #define GPIO143_PAD PAD_SPDIF_OUT
851*53ee8cc1Swenshuai.xi #define GPIO143_OEN 0x1025a0, BIT5
852*53ee8cc1Swenshuai.xi #define GPIO143_OUT 0x1025a0, BIT4
853*53ee8cc1Swenshuai.xi #define GPIO143_IN  0x1025a0, BIT0
854*53ee8cc1Swenshuai.xi 
855*53ee8cc1Swenshuai.xi #define GPIO144_PAD PAD_I2CM0_SCL
856*53ee8cc1Swenshuai.xi #define GPIO144_OEN 0x10251c, BIT5
857*53ee8cc1Swenshuai.xi #define GPIO144_OUT 0x10251c, BIT4
858*53ee8cc1Swenshuai.xi #define GPIO144_IN  0x10251c, BIT0
859*53ee8cc1Swenshuai.xi 
860*53ee8cc1Swenshuai.xi #define GPIO145_PAD PAD_I2CM0_SDA
861*53ee8cc1Swenshuai.xi #define GPIO145_OEN 0x10251e, BIT5
862*53ee8cc1Swenshuai.xi #define GPIO145_OUT 0x10251e, BIT4
863*53ee8cc1Swenshuai.xi #define GPIO145_IN  0x10251e, BIT0
864*53ee8cc1Swenshuai.xi 
865*53ee8cc1Swenshuai.xi #define GPIO146_PAD PAD_I2CM1_SCL
866*53ee8cc1Swenshuai.xi #define GPIO146_OEN 0x102520, BIT5
867*53ee8cc1Swenshuai.xi #define GPIO146_OUT 0x102520, BIT4
868*53ee8cc1Swenshuai.xi #define GPIO146_IN  0x102520, BIT0
869*53ee8cc1Swenshuai.xi 
870*53ee8cc1Swenshuai.xi #define GPIO147_PAD PAD_I2CM1_SDA
871*53ee8cc1Swenshuai.xi #define GPIO147_OEN 0x102522, BIT5
872*53ee8cc1Swenshuai.xi #define GPIO147_OUT 0x102522, BIT4
873*53ee8cc1Swenshuai.xi #define GPIO147_IN  0x102522, BIT0
874*53ee8cc1Swenshuai.xi 
875*53ee8cc1Swenshuai.xi #define GPIO148_PAD PAD_HDMITX_SCL
876*53ee8cc1Swenshuai.xi #define GPIO148_OEN 0x1025da, BIT5
877*53ee8cc1Swenshuai.xi #define GPIO148_OUT 0x1025da, BIT4
878*53ee8cc1Swenshuai.xi #define GPIO148_IN  0x1025da, BIT0
879*53ee8cc1Swenshuai.xi 
880*53ee8cc1Swenshuai.xi #define GPIO149_PAD PAD_HDMITX_SDA
881*53ee8cc1Swenshuai.xi #define GPIO149_OEN 0x1025dc, BIT5
882*53ee8cc1Swenshuai.xi #define GPIO149_OUT 0x1025dc, BIT4
883*53ee8cc1Swenshuai.xi #define GPIO149_IN  0x1025dc, BIT0
884*53ee8cc1Swenshuai.xi 
885*53ee8cc1Swenshuai.xi #define GPIO150_PAD PAD_EMMC_IO0
886*53ee8cc1Swenshuai.xi #define GPIO150_OEN 0x102570, BIT5
887*53ee8cc1Swenshuai.xi #define GPIO150_OUT 0x102570, BIT4
888*53ee8cc1Swenshuai.xi #define GPIO150_IN  0x102570, BIT0
889*53ee8cc1Swenshuai.xi 
890*53ee8cc1Swenshuai.xi #define GPIO151_PAD PAD_EMMC_IO1
891*53ee8cc1Swenshuai.xi #define GPIO151_OEN 0x102572, BIT5
892*53ee8cc1Swenshuai.xi #define GPIO151_OUT 0x102572, BIT4
893*53ee8cc1Swenshuai.xi #define GPIO151_IN  0x102572, BIT0
894*53ee8cc1Swenshuai.xi 
895*53ee8cc1Swenshuai.xi #define GPIO152_PAD PAD_EMMC_IO2
896*53ee8cc1Swenshuai.xi #define GPIO152_OEN 0x102574, BIT5
897*53ee8cc1Swenshuai.xi #define GPIO152_OUT 0x102574, BIT4
898*53ee8cc1Swenshuai.xi #define GPIO152_IN  0x102574, BIT0
899*53ee8cc1Swenshuai.xi 
900*53ee8cc1Swenshuai.xi #define GPIO153_PAD PAD_EMMC_IO3
901*53ee8cc1Swenshuai.xi #define GPIO153_OEN 0x102576, BIT5
902*53ee8cc1Swenshuai.xi #define GPIO153_OUT 0x102576, BIT4
903*53ee8cc1Swenshuai.xi #define GPIO153_IN  0x102576, BIT0
904*53ee8cc1Swenshuai.xi 
905*53ee8cc1Swenshuai.xi #define GPIO154_PAD PAD_EMMC_IO4
906*53ee8cc1Swenshuai.xi #define GPIO154_OEN 0x102578, BIT5
907*53ee8cc1Swenshuai.xi #define GPIO154_OUT 0x102578, BIT4
908*53ee8cc1Swenshuai.xi #define GPIO154_IN  0x102578, BIT0
909*53ee8cc1Swenshuai.xi 
910*53ee8cc1Swenshuai.xi #define GPIO155_PAD PAD_EMMC_IO5
911*53ee8cc1Swenshuai.xi #define GPIO155_OEN 0x10257a, BIT5
912*53ee8cc1Swenshuai.xi #define GPIO155_OUT 0x10257a, BIT4
913*53ee8cc1Swenshuai.xi #define GPIO155_IN  0x10257a, BIT0
914*53ee8cc1Swenshuai.xi 
915*53ee8cc1Swenshuai.xi #define GPIO156_PAD PAD_EMMC_IO6
916*53ee8cc1Swenshuai.xi #define GPIO156_OEN 0x10257c, BIT5
917*53ee8cc1Swenshuai.xi #define GPIO156_OUT 0x10257c, BIT4
918*53ee8cc1Swenshuai.xi #define GPIO156_IN  0x10257c, BIT0
919*53ee8cc1Swenshuai.xi 
920*53ee8cc1Swenshuai.xi #define GPIO157_PAD PAD_EMMC_IO7
921*53ee8cc1Swenshuai.xi #define GPIO157_OEN 0x10257e, BIT5
922*53ee8cc1Swenshuai.xi #define GPIO157_OUT 0x10257e, BIT4
923*53ee8cc1Swenshuai.xi #define GPIO157_IN  0x10257e, BIT0
924*53ee8cc1Swenshuai.xi 
925*53ee8cc1Swenshuai.xi #define GPIO158_PAD PAD_EMMC_IO8
926*53ee8cc1Swenshuai.xi #define GPIO158_OEN 0x102580, BIT5
927*53ee8cc1Swenshuai.xi #define GPIO158_OUT 0x102580, BIT4
928*53ee8cc1Swenshuai.xi #define GPIO158_IN  0x102580, BIT0
929*53ee8cc1Swenshuai.xi 
930*53ee8cc1Swenshuai.xi #define GPIO159_PAD PAD_EMMC_IO9
931*53ee8cc1Swenshuai.xi #define GPIO159_OEN 0x102582, BIT5
932*53ee8cc1Swenshuai.xi #define GPIO159_OUT 0x102582, BIT4
933*53ee8cc1Swenshuai.xi #define GPIO159_IN  0x102582, BIT0
934*53ee8cc1Swenshuai.xi 
935*53ee8cc1Swenshuai.xi #define GPIO160_PAD PAD_EMMC_IO10
936*53ee8cc1Swenshuai.xi #define GPIO160_OEN 0x102584, BIT5
937*53ee8cc1Swenshuai.xi #define GPIO160_OUT 0x102584, BIT4
938*53ee8cc1Swenshuai.xi #define GPIO160_IN  0x102584, BIT0
939*53ee8cc1Swenshuai.xi 
940*53ee8cc1Swenshuai.xi #define GPIO161_PAD PAD_EMMC_IO11
941*53ee8cc1Swenshuai.xi #define GPIO161_OEN 0x102586, BIT5
942*53ee8cc1Swenshuai.xi #define GPIO161_OUT 0x102586, BIT4
943*53ee8cc1Swenshuai.xi #define GPIO161_IN  0x102586, BIT0
944*53ee8cc1Swenshuai.xi 
945*53ee8cc1Swenshuai.xi #define GPIO162_PAD PAD_EMMC_IO12
946*53ee8cc1Swenshuai.xi #define GPIO162_OEN 0x102588, BIT5
947*53ee8cc1Swenshuai.xi #define GPIO162_OUT 0x102588, BIT4
948*53ee8cc1Swenshuai.xi #define GPIO162_IN  0x102588, BIT0
949*53ee8cc1Swenshuai.xi 
950*53ee8cc1Swenshuai.xi #define GPIO163_PAD PAD_EMMC_IO13
951*53ee8cc1Swenshuai.xi #define GPIO163_OEN 0x10258a, BIT5
952*53ee8cc1Swenshuai.xi #define GPIO163_OUT 0x10258a, BIT4
953*53ee8cc1Swenshuai.xi #define GPIO163_IN  0x10258a, BIT0
954*53ee8cc1Swenshuai.xi 
955*53ee8cc1Swenshuai.xi #define GPIO164_PAD PAD_EMMC_IO14
956*53ee8cc1Swenshuai.xi #define GPIO164_OEN 0x10258c, BIT5
957*53ee8cc1Swenshuai.xi #define GPIO164_OUT 0x10258c, BIT4
958*53ee8cc1Swenshuai.xi #define GPIO164_IN  0x10258c, BIT0
959*53ee8cc1Swenshuai.xi 
960*53ee8cc1Swenshuai.xi #define GPIO165_PAD PAD_EMMC_IO15
961*53ee8cc1Swenshuai.xi #define GPIO165_OEN 0x10258e, BIT5
962*53ee8cc1Swenshuai.xi #define GPIO165_OUT 0x10258e, BIT4
963*53ee8cc1Swenshuai.xi #define GPIO165_IN  0x10258e, BIT0
964*53ee8cc1Swenshuai.xi 
965*53ee8cc1Swenshuai.xi #define GPIO166_PAD PAD_EMMC_IO16
966*53ee8cc1Swenshuai.xi #define GPIO166_OEN 0x102590, BIT5
967*53ee8cc1Swenshuai.xi #define GPIO166_OUT 0x102590, BIT4
968*53ee8cc1Swenshuai.xi #define GPIO166_IN  0x102590, BIT0
969*53ee8cc1Swenshuai.xi 
970*53ee8cc1Swenshuai.xi #define GPIO167_PAD PAD_EMMC_IO17
971*53ee8cc1Swenshuai.xi #define GPIO167_OEN 0x102592, BIT5
972*53ee8cc1Swenshuai.xi #define GPIO167_OUT 0x102592, BIT4
973*53ee8cc1Swenshuai.xi #define GPIO167_IN  0x102592, BIT0
974*53ee8cc1Swenshuai.xi 
975*53ee8cc1Swenshuai.xi #define GPIO168_PAD PAD_DM_P0
976*53ee8cc1Swenshuai.xi #define GPIO168_OEN 0x103a8a, BIT4
977*53ee8cc1Swenshuai.xi #define GPIO168_OUT 0x103a8a, BIT2
978*53ee8cc1Swenshuai.xi #define GPIO168_IN  0x103ab1, BIT5
979*53ee8cc1Swenshuai.xi 
980*53ee8cc1Swenshuai.xi #define GPIO169_PAD PAD_DP_P0
981*53ee8cc1Swenshuai.xi #define GPIO169_OEN 0x103a8a, BIT5
982*53ee8cc1Swenshuai.xi #define GPIO169_OUT 0x103a8a, BIT3
983*53ee8cc1Swenshuai.xi #define GPIO169_IN  0x103ab1, BIT4
984*53ee8cc1Swenshuai.xi 
985*53ee8cc1Swenshuai.xi #define GPIO170_PAD PAD_DM_P1
986*53ee8cc1Swenshuai.xi #define GPIO170_OEN 0x103a0a, BIT4
987*53ee8cc1Swenshuai.xi #define GPIO170_OUT 0x103a0a, BIT2
988*53ee8cc1Swenshuai.xi #define GPIO170_IN  0x103a31, BIT5
989*53ee8cc1Swenshuai.xi 
990*53ee8cc1Swenshuai.xi #define GPIO171_PAD PAD_DP_P1
991*53ee8cc1Swenshuai.xi #define GPIO171_OEN 0x103a0a, BIT5
992*53ee8cc1Swenshuai.xi #define GPIO171_OUT 0x103a0a, BIT3
993*53ee8cc1Swenshuai.xi #define GPIO171_IN  0x103a31, BIT4
994*53ee8cc1Swenshuai.xi 
995*53ee8cc1Swenshuai.xi #define GPIO172_PAD PAD_DM_P2
996*53ee8cc1Swenshuai.xi #define GPIO172_OEN 0x10380a, BIT4
997*53ee8cc1Swenshuai.xi #define GPIO172_OUT 0x10380a, BIT2
998*53ee8cc1Swenshuai.xi #define GPIO172_IN  0x103831, BIT5
999*53ee8cc1Swenshuai.xi 
1000*53ee8cc1Swenshuai.xi #define GPIO173_PAD PAD_DP_P2
1001*53ee8cc1Swenshuai.xi #define GPIO173_OEN 0x10380a, BIT5
1002*53ee8cc1Swenshuai.xi #define GPIO173_OUT 0x10380a, BIT3
1003*53ee8cc1Swenshuai.xi #define GPIO173_IN  0x103831, BIT4
1004*53ee8cc1Swenshuai.xi 
1005*53ee8cc1Swenshuai.xi 
1006*53ee8cc1Swenshuai.xi #define GPIO174_PAD PADA_TSIO_OUTN_CH0
1007*53ee8cc1Swenshuai.xi #define GPIO174_OEN 0x171f02, BIT2
1008*53ee8cc1Swenshuai.xi #define GPIO174_OUT 0x171f03, BIT0
1009*53ee8cc1Swenshuai.xi #define GPIO174_IN  0x171f1b, BIT0
1010*53ee8cc1Swenshuai.xi 
1011*53ee8cc1Swenshuai.xi #define GPIO175_PAD PADA_TSIO_OUTP_CH0
1012*53ee8cc1Swenshuai.xi #define GPIO175_OEN 0x171f02, BIT0
1013*53ee8cc1Swenshuai.xi #define GPIO175_OUT 0x171f03, BIT2
1014*53ee8cc1Swenshuai.xi #define GPIO175_IN  0x171f1b, BIT2
1015*53ee8cc1Swenshuai.xi 
1016*53ee8cc1Swenshuai.xi #define GPIO176_PAD PADA_TSIO_OUTN_CH1
1017*53ee8cc1Swenshuai.xi #define GPIO176_OEN 0x171f02, BIT3
1018*53ee8cc1Swenshuai.xi #define GPIO176_OUT 0x171f03, BIT1
1019*53ee8cc1Swenshuai.xi #define GPIO176_IN  0x171f1b, BIT1
1020*53ee8cc1Swenshuai.xi 
1021*53ee8cc1Swenshuai.xi #define GPIO177_PAD PADA_TSIO_OUTP_CH1
1022*53ee8cc1Swenshuai.xi #define GPIO177_OEN 0x171f02, BIT1
1023*53ee8cc1Swenshuai.xi #define GPIO177_OUT 0x171f03, BIT3
1024*53ee8cc1Swenshuai.xi #define GPIO177_IN  0x171f1b, BIT3
1025*53ee8cc1Swenshuai.xi 
1026*53ee8cc1Swenshuai.xi #define GPIO178_PAD PADA_TSIO_INN
1027*53ee8cc1Swenshuai.xi #define GPIO178_OEN 0x171f28, BIT1
1028*53ee8cc1Swenshuai.xi #define GPIO178_OUT 0x171f28, BIT0
1029*53ee8cc1Swenshuai.xi #define GPIO178_IN  0x171f22, BIT3
1030*53ee8cc1Swenshuai.xi 
1031*53ee8cc1Swenshuai.xi #define GPIO179_PAD PADA_TSIO_INP
1032*53ee8cc1Swenshuai.xi #define GPIO179_OEN 0x171f28, BIT3
1033*53ee8cc1Swenshuai.xi #define GPIO179_OUT 0x171f28, BIT2
1034*53ee8cc1Swenshuai.xi #define GPIO179_IN  0x171f22, BIT4
1035*53ee8cc1Swenshuai.xi 
1036*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1037*53ee8cc1Swenshuai.xi //  Local Structures
1038*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1039*53ee8cc1Swenshuai.xi 
1040*53ee8cc1Swenshuai.xi static const struct gpio_setting
1041*53ee8cc1Swenshuai.xi {
1042*53ee8cc1Swenshuai.xi     MS_U32 r_oen;
1043*53ee8cc1Swenshuai.xi     MS_U8  m_oen;
1044*53ee8cc1Swenshuai.xi     MS_U32 r_out;
1045*53ee8cc1Swenshuai.xi     MS_U8  m_out;
1046*53ee8cc1Swenshuai.xi     MS_U32 r_in;
1047*53ee8cc1Swenshuai.xi     MS_U8  m_in;
1048*53ee8cc1Swenshuai.xi } gpio_table[] =
1049*53ee8cc1Swenshuai.xi {
1050*53ee8cc1Swenshuai.xi #define __GPIO__(_x_)   { CONCAT(CONCAT(GPIO, _x_), _OEN),   \
1051*53ee8cc1Swenshuai.xi                           CONCAT(CONCAT(GPIO, _x_), _OUT),   \
1052*53ee8cc1Swenshuai.xi                           CONCAT(CONCAT(GPIO, _x_), _IN) }
1053*53ee8cc1Swenshuai.xi #define __GPIO(_x_)     __GPIO__(_x_)
1054*53ee8cc1Swenshuai.xi 
1055*53ee8cc1Swenshuai.xi //
1056*53ee8cc1Swenshuai.xi // !! WARNING !! DO NOT MODIFIY !!!!
1057*53ee8cc1Swenshuai.xi //
1058*53ee8cc1Swenshuai.xi // These defines order must match following
1059*53ee8cc1Swenshuai.xi // 1. the PAD name in GPIO excel
1060*53ee8cc1Swenshuai.xi // 2. the perl script to generate the package header file
1061*53ee8cc1Swenshuai.xi //
1062*53ee8cc1Swenshuai.xi     __GPIO(999), // 0 is not used
1063*53ee8cc1Swenshuai.xi 
1064*53ee8cc1Swenshuai.xi     __GPIO(0), __GPIO(1), __GPIO(2), __GPIO(3), __GPIO(4),
1065*53ee8cc1Swenshuai.xi     __GPIO(5), __GPIO(6), __GPIO(7), __GPIO(8), __GPIO(9),
1066*53ee8cc1Swenshuai.xi     __GPIO(10), __GPIO(11), __GPIO(12), __GPIO(13), __GPIO(14),
1067*53ee8cc1Swenshuai.xi     __GPIO(15), __GPIO(16), __GPIO(17), __GPIO(18), __GPIO(19),
1068*53ee8cc1Swenshuai.xi     __GPIO(20), __GPIO(21), __GPIO(22), __GPIO(23), __GPIO(24),
1069*53ee8cc1Swenshuai.xi     __GPIO(25), __GPIO(26), __GPIO(27), __GPIO(28), __GPIO(29),
1070*53ee8cc1Swenshuai.xi     __GPIO(30), __GPIO(31), __GPIO(32), __GPIO(33), __GPIO(34),
1071*53ee8cc1Swenshuai.xi     __GPIO(35), __GPIO(36), __GPIO(37), __GPIO(38), __GPIO(39),
1072*53ee8cc1Swenshuai.xi     __GPIO(40), __GPIO(41), __GPIO(42), __GPIO(43), __GPIO(44),
1073*53ee8cc1Swenshuai.xi     __GPIO(45), __GPIO(46), __GPIO(47), __GPIO(48), __GPIO(49),
1074*53ee8cc1Swenshuai.xi     __GPIO(50), __GPIO(51), __GPIO(52), __GPIO(53), __GPIO(54),
1075*53ee8cc1Swenshuai.xi     __GPIO(55), __GPIO(56), __GPIO(57), __GPIO(58), __GPIO(59),
1076*53ee8cc1Swenshuai.xi     __GPIO(60), __GPIO(61), __GPIO(62), __GPIO(63), __GPIO(64),
1077*53ee8cc1Swenshuai.xi     __GPIO(65), __GPIO(66), __GPIO(67), __GPIO(68), __GPIO(69),
1078*53ee8cc1Swenshuai.xi     __GPIO(70), __GPIO(71), __GPIO(72), __GPIO(73), __GPIO(74),
1079*53ee8cc1Swenshuai.xi     __GPIO(75), __GPIO(76), __GPIO(77), __GPIO(78), __GPIO(79),
1080*53ee8cc1Swenshuai.xi     __GPIO(80), __GPIO(81), __GPIO(82), __GPIO(83), __GPIO(84),
1081*53ee8cc1Swenshuai.xi     __GPIO(85), __GPIO(86), __GPIO(87), __GPIO(88), __GPIO(89),
1082*53ee8cc1Swenshuai.xi     __GPIO(90), __GPIO(91), __GPIO(92), __GPIO(93), __GPIO(94),
1083*53ee8cc1Swenshuai.xi     __GPIO(95), __GPIO(96), __GPIO(97), __GPIO(98), __GPIO(99),
1084*53ee8cc1Swenshuai.xi     __GPIO(100), __GPIO(101), __GPIO(102), __GPIO(103), __GPIO(104),
1085*53ee8cc1Swenshuai.xi     __GPIO(105), __GPIO(106), __GPIO(107), __GPIO(108), __GPIO(109),
1086*53ee8cc1Swenshuai.xi     __GPIO(110), __GPIO(111), __GPIO(112), __GPIO(113), __GPIO(114),
1087*53ee8cc1Swenshuai.xi     __GPIO(115), __GPIO(116), __GPIO(117), __GPIO(118), __GPIO(119),
1088*53ee8cc1Swenshuai.xi     __GPIO(120), __GPIO(121), __GPIO(122), __GPIO(123), __GPIO(124),
1089*53ee8cc1Swenshuai.xi     __GPIO(125), __GPIO(126), __GPIO(127), __GPIO(128), __GPIO(129),
1090*53ee8cc1Swenshuai.xi     __GPIO(130), __GPIO(131), __GPIO(132), __GPIO(133), __GPIO(134),
1091*53ee8cc1Swenshuai.xi     __GPIO(135), __GPIO(136), __GPIO(137), __GPIO(138), __GPIO(139),
1092*53ee8cc1Swenshuai.xi     __GPIO(140), __GPIO(141), __GPIO(142), __GPIO(143), __GPIO(144),
1093*53ee8cc1Swenshuai.xi     __GPIO(145), __GPIO(146), __GPIO(147), __GPIO(148), __GPIO(149),
1094*53ee8cc1Swenshuai.xi     __GPIO(150), __GPIO(151), __GPIO(152), __GPIO(153), __GPIO(154),
1095*53ee8cc1Swenshuai.xi     __GPIO(155), __GPIO(156), __GPIO(157), __GPIO(158), __GPIO(159),
1096*53ee8cc1Swenshuai.xi     __GPIO(160), __GPIO(161), __GPIO(162), __GPIO(163), __GPIO(164),
1097*53ee8cc1Swenshuai.xi     __GPIO(165), __GPIO(166), __GPIO(167), __GPIO(168), __GPIO(169),
1098*53ee8cc1Swenshuai.xi     __GPIO(170), __GPIO(171), __GPIO(172), __GPIO(173), __GPIO(174),
1099*53ee8cc1Swenshuai.xi     __GPIO(175), __GPIO(176), __GPIO(177), __GPIO(178), __GPIO(179),
1100*53ee8cc1Swenshuai.xi };
1101*53ee8cc1Swenshuai.xi 
1102*53ee8cc1Swenshuai.xi 
1103*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1104*53ee8cc1Swenshuai.xi //  Global Variables
1105*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1106*53ee8cc1Swenshuai.xi static MS_VIRT _gMIO_MapBase = 0;
1107*53ee8cc1Swenshuai.xi static MS_VIRT _gMIO_MapBase_PM = 0;
1108*53ee8cc1Swenshuai.xi static MS_VIRT _gMIO_MapBase_nonPM = 0;
1109*53ee8cc1Swenshuai.xi 
1110*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1111*53ee8cc1Swenshuai.xi //  Local Variables
1112*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1113*53ee8cc1Swenshuai.xi 
1114*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1115*53ee8cc1Swenshuai.xi //  Debug Functions
1116*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1117*53ee8cc1Swenshuai.xi 
1118*53ee8cc1Swenshuai.xi 
1119*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1120*53ee8cc1Swenshuai.xi //  Local Functions
1121*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1122*53ee8cc1Swenshuai.xi 
1123*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1124*53ee8cc1Swenshuai.xi //  Global Functions
1125*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
HAL_Gpio_Set_High(MS_GPIO_NUM gpio)1126*53ee8cc1Swenshuai.xi static void HAL_Gpio_Set_High(MS_GPIO_NUM gpio)
1127*53ee8cc1Swenshuai.xi {
1128*53ee8cc1Swenshuai.xi     if (gpio >= 1 && gpio <= END_GPIO_NUM)
1129*53ee8cc1Swenshuai.xi     {
1130*53ee8cc1Swenshuai.xi         _gMIO_MapBase = _gMIO_MapBase_PM;
1131*53ee8cc1Swenshuai.xi         MDrv_WriteRegBit(gpio_table[gpio].r_out, 1, gpio_table[gpio].m_out);
1132*53ee8cc1Swenshuai.xi         MDrv_WriteRegBit(gpio_table[gpio].r_oen, 0, gpio_table[gpio].m_oen);
1133*53ee8cc1Swenshuai.xi     }
1134*53ee8cc1Swenshuai.xi     else
1135*53ee8cc1Swenshuai.xi     {
1136*53ee8cc1Swenshuai.xi         MS_ASSERT(0);
1137*53ee8cc1Swenshuai.xi     }
1138*53ee8cc1Swenshuai.xi }
1139*53ee8cc1Swenshuai.xi 
HAL_Gpio_Set_Low(MS_GPIO_NUM gpio)1140*53ee8cc1Swenshuai.xi static void HAL_Gpio_Set_Low(MS_GPIO_NUM gpio)
1141*53ee8cc1Swenshuai.xi {
1142*53ee8cc1Swenshuai.xi     if (gpio >= 1 && gpio <= END_GPIO_NUM)
1143*53ee8cc1Swenshuai.xi     {
1144*53ee8cc1Swenshuai.xi         _gMIO_MapBase = _gMIO_MapBase_PM;
1145*53ee8cc1Swenshuai.xi         MDrv_WriteRegBit(gpio_table[gpio].r_out, 0, gpio_table[gpio].m_out);
1146*53ee8cc1Swenshuai.xi         MDrv_WriteRegBit(gpio_table[gpio].r_oen, 0, gpio_table[gpio].m_oen);
1147*53ee8cc1Swenshuai.xi     }
1148*53ee8cc1Swenshuai.xi     else
1149*53ee8cc1Swenshuai.xi     {
1150*53ee8cc1Swenshuai.xi         MS_ASSERT(0);
1151*53ee8cc1Swenshuai.xi     }
1152*53ee8cc1Swenshuai.xi }
1153*53ee8cc1Swenshuai.xi 
HAL_Gpio_Set_Input(MS_GPIO_NUM gpio)1154*53ee8cc1Swenshuai.xi static void HAL_Gpio_Set_Input(MS_GPIO_NUM gpio)
1155*53ee8cc1Swenshuai.xi {
1156*53ee8cc1Swenshuai.xi     if (gpio >= 1 && gpio <= END_GPIO_NUM)
1157*53ee8cc1Swenshuai.xi     {
1158*53ee8cc1Swenshuai.xi         _gMIO_MapBase = _gMIO_MapBase_PM;
1159*53ee8cc1Swenshuai.xi         MDrv_WriteRegBit(gpio_table[gpio].r_oen, 1, gpio_table[gpio].m_oen);
1160*53ee8cc1Swenshuai.xi     }
1161*53ee8cc1Swenshuai.xi     else
1162*53ee8cc1Swenshuai.xi     {
1163*53ee8cc1Swenshuai.xi         MS_ASSERT(0);
1164*53ee8cc1Swenshuai.xi     }
1165*53ee8cc1Swenshuai.xi }
1166*53ee8cc1Swenshuai.xi 
HAL_Gpio_Get_InOut(MS_GPIO_NUM gpio)1167*53ee8cc1Swenshuai.xi static int HAL_Gpio_Get_InOut(MS_GPIO_NUM gpio)
1168*53ee8cc1Swenshuai.xi {
1169*53ee8cc1Swenshuai.xi     int r;
1170*53ee8cc1Swenshuai.xi 
1171*53ee8cc1Swenshuai.xi     if (gpio >= 1 && gpio <= END_GPIO_NUM)
1172*53ee8cc1Swenshuai.xi     {
1173*53ee8cc1Swenshuai.xi         _gMIO_MapBase = _gMIO_MapBase_PM;
1174*53ee8cc1Swenshuai.xi         r = MDrv_ReadRegBit(gpio_table[gpio].r_oen, gpio_table[gpio].m_oen);
1175*53ee8cc1Swenshuai.xi     }
1176*53ee8cc1Swenshuai.xi     else
1177*53ee8cc1Swenshuai.xi     {
1178*53ee8cc1Swenshuai.xi         r = 0;
1179*53ee8cc1Swenshuai.xi         MS_ASSERT(0);
1180*53ee8cc1Swenshuai.xi     }
1181*53ee8cc1Swenshuai.xi 
1182*53ee8cc1Swenshuai.xi     return (r != 0);
1183*53ee8cc1Swenshuai.xi }
1184*53ee8cc1Swenshuai.xi 
1185*53ee8cc1Swenshuai.xi 
HAL_Gpio_Get_Level(MS_GPIO_NUM gpio)1186*53ee8cc1Swenshuai.xi static int HAL_Gpio_Get_Level(MS_GPIO_NUM gpio)
1187*53ee8cc1Swenshuai.xi {
1188*53ee8cc1Swenshuai.xi     int r;
1189*53ee8cc1Swenshuai.xi 
1190*53ee8cc1Swenshuai.xi     if (gpio >= 1 && gpio <= END_GPIO_NUM)
1191*53ee8cc1Swenshuai.xi     {
1192*53ee8cc1Swenshuai.xi         _gMIO_MapBase = _gMIO_MapBase_PM;
1193*53ee8cc1Swenshuai.xi         r = MDrv_ReadRegBit(gpio_table[gpio].r_in, gpio_table[gpio].m_in);
1194*53ee8cc1Swenshuai.xi     }
1195*53ee8cc1Swenshuai.xi     else
1196*53ee8cc1Swenshuai.xi     {
1197*53ee8cc1Swenshuai.xi         r = 0;
1198*53ee8cc1Swenshuai.xi         MS_ASSERT(0);
1199*53ee8cc1Swenshuai.xi     }
1200*53ee8cc1Swenshuai.xi 
1201*53ee8cc1Swenshuai.xi     return (r != 0);
1202*53ee8cc1Swenshuai.xi }
1203*53ee8cc1Swenshuai.xi 
1204*53ee8cc1Swenshuai.xi const struct gpio_operations __gpio =
1205*53ee8cc1Swenshuai.xi {
1206*53ee8cc1Swenshuai.xi     .set_high  = HAL_Gpio_Set_High,
1207*53ee8cc1Swenshuai.xi     .set_low   = HAL_Gpio_Set_Low,
1208*53ee8cc1Swenshuai.xi     .set_input = HAL_Gpio_Set_Input,
1209*53ee8cc1Swenshuai.xi     .get_inout = HAL_Gpio_Get_InOut,
1210*53ee8cc1Swenshuai.xi     .get_level = HAL_Gpio_Get_Level,
1211*53ee8cc1Swenshuai.xi };
1212*53ee8cc1Swenshuai.xi 
1213*53ee8cc1Swenshuai.xi 
HAL_GPIO_SetIOMapBase(MS_VIRT u32Base)1214*53ee8cc1Swenshuai.xi void HAL_GPIO_SetIOMapBase(MS_VIRT u32Base)
1215*53ee8cc1Swenshuai.xi {
1216*53ee8cc1Swenshuai.xi     _gMIO_MapBase_nonPM = u32Base;
1217*53ee8cc1Swenshuai.xi }
1218*53ee8cc1Swenshuai.xi 
HAL_GPIO_SetIOMapBase_PM(MS_VIRT u32Base)1219*53ee8cc1Swenshuai.xi void HAL_GPIO_SetIOMapBase_PM(MS_VIRT u32Base)
1220*53ee8cc1Swenshuai.xi {
1221*53ee8cc1Swenshuai.xi     _gMIO_MapBase_PM = u32Base;
1222*53ee8cc1Swenshuai.xi }
1223*53ee8cc1Swenshuai.xi 
HAL_GPIO_Interrupt_Init(void)1224*53ee8cc1Swenshuai.xi void HAL_GPIO_Interrupt_Init(void)
1225*53ee8cc1Swenshuai.xi {
1226*53ee8cc1Swenshuai.xi 
1227*53ee8cc1Swenshuai.xi }
1228*53ee8cc1Swenshuai.xi 
HAL_GPIO_Interrupt_Action(void)1229*53ee8cc1Swenshuai.xi void HAL_GPIO_Interrupt_Action(void)
1230*53ee8cc1Swenshuai.xi {
1231*53ee8cc1Swenshuai.xi 
1232*53ee8cc1Swenshuai.xi }
1233*53ee8cc1Swenshuai.xi 
HAL_GPIO_Attach_Interrupt(MS_GPIO_NUM gpio_num,GPIO_Edge gpio_edge_type,GPIO_Callback pCallback)1234*53ee8cc1Swenshuai.xi GPIO_Result HAL_GPIO_Attach_Interrupt(MS_GPIO_NUM gpio_num,GPIO_Edge gpio_edge_type,GPIO_Callback pCallback)
1235*53ee8cc1Swenshuai.xi {
1236*53ee8cc1Swenshuai.xi     printf("Not Support HAL_GPIO_Attach_Interrupt %d, %d \n", gpio_num, gpio_edge_type);
1237*53ee8cc1Swenshuai.xi     return E_GPIO_NOT_SUPPORT;
1238*53ee8cc1Swenshuai.xi }
1239*53ee8cc1Swenshuai.xi 
HAL_GPIO_Datach_Interrupt(MS_GPIO_NUM gpio_num)1240*53ee8cc1Swenshuai.xi GPIO_Result HAL_GPIO_Datach_Interrupt(MS_GPIO_NUM gpio_num)
1241*53ee8cc1Swenshuai.xi {
1242*53ee8cc1Swenshuai.xi     printf("Not Support HAL_GPIO_Datach_Interrupt %d\n", gpio_num);
1243*53ee8cc1Swenshuai.xi     return E_GPIO_NOT_SUPPORT;
1244*53ee8cc1Swenshuai.xi }
1245*53ee8cc1Swenshuai.xi 
HAL_GPIO_Enable_Interrupt(MS_GPIO_NUM gpio)1246*53ee8cc1Swenshuai.xi GPIO_Result HAL_GPIO_Enable_Interrupt(MS_GPIO_NUM gpio)
1247*53ee8cc1Swenshuai.xi {
1248*53ee8cc1Swenshuai.xi     printf("Not Support HAL_GPIO_Enable_Interrupt %d\n", gpio);
1249*53ee8cc1Swenshuai.xi     return E_GPIO_NOT_SUPPORT;
1250*53ee8cc1Swenshuai.xi }
1251*53ee8cc1Swenshuai.xi 
HAL_GPIO_Disable_Interrupt(MS_GPIO_NUM gpio)1252*53ee8cc1Swenshuai.xi GPIO_Result HAL_GPIO_Disable_Interrupt(MS_GPIO_NUM gpio)
1253*53ee8cc1Swenshuai.xi {
1254*53ee8cc1Swenshuai.xi     printf("Not Support HAL_GPIO_Disable_Interrupt %d\n", gpio);
1255*53ee8cc1Swenshuai.xi     return E_GPIO_NOT_SUPPORT;
1256*53ee8cc1Swenshuai.xi }
1257*53ee8cc1Swenshuai.xi 
HAL_GPIO_Enable_Interrupt_all(void)1258*53ee8cc1Swenshuai.xi void HAL_GPIO_Enable_Interrupt_all(void)
1259*53ee8cc1Swenshuai.xi {
1260*53ee8cc1Swenshuai.xi 
1261*53ee8cc1Swenshuai.xi }
1262*53ee8cc1Swenshuai.xi 
HAL_GPIO_Disable_Interrupt_all(void)1263*53ee8cc1Swenshuai.xi void HAL_GPIO_Disable_Interrupt_all(void)
1264*53ee8cc1Swenshuai.xi {
1265*53ee8cc1Swenshuai.xi 
1266*53ee8cc1Swenshuai.xi }
1267*53ee8cc1Swenshuai.xi 
1268*53ee8cc1Swenshuai.xi #endif      //_HALGPIO_C_
1269