Home
last modified time | relevance | path

Searched refs:ADDR_INDR_WRITE1 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DhalTSP.c299 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
519 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
542 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
628 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
643 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
653 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DhalTSP.c303 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
523 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
546 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
632 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
647 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
657 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DhalTSP.c300 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
520 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
543 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
629 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
644 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
654 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DhalTSP.c375 #define ADDR_INDR_WRITE1 (_u32RegBase+ 0x2b30) macro
594 REG16_T(ADDR_INDR_WRITE1)= ((value >> 16) & 0xFFFF); in HAL_REG32_IndW_tmp()
616 REG16_T(ADDR_INDR_WRITE1)= ((value >> 16) & 0xFFFF); in HAL_REG32_IndW()
765 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
780 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
790 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DhalTSP.c493 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
717 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
741 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
874 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
889 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
899 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DhalTSP.c507 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
731 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
755 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
888 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
903 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
913 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DhalTSP.c444 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
668 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
692 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
825 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
840 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
850 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DhalTSP.c513 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
737 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
761 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
894 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
909 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
919 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DhalTSP.c513 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
737 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
761 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
894 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
909 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
919 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DhalTSP.c531 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
755 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
779 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
912 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
927 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
937 #undef ADDR_INDR_WRITE1
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DhalTSP.c531 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL) macro
755 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW_tmp()
779 REG16_T(ADDR_INDR_WRITE1)= (MS_U16)(value >> 16UL); in HAL_REG32_IndW()
912 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
927 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
937 #undef ADDR_INDR_WRITE1