Searched refs:reg_rc_roi (Results 1 – 13 of 13) sorted by relevance
110 Vepu510RcRoi *r = ®s->reg_rc_roi; in vepu510_h265e_tune_aq()309 fb->st_madi = madi_th_cnt0 * regs_set->reg_rc_roi.madi_st_thd.madi_th0 + in vepu510_h265e_tune_stat_update()310 madi_th_cnt1 * (regs_set->reg_rc_roi.madi_st_thd.madi_th0 + in vepu510_h265e_tune_stat_update()311 regs_set->reg_rc_roi.madi_st_thd.madi_th1) / 2 + in vepu510_h265e_tune_stat_update()312 madi_th_cnt2 * (regs_set->reg_rc_roi.madi_st_thd.madi_th1 + in vepu510_h265e_tune_stat_update()313 regs_set->reg_rc_roi.madi_st_thd.madi_th2) / 2 + in vepu510_h265e_tune_stat_update()314 madi_th_cnt3 * regs_set->reg_rc_roi.madi_st_thd.madi_th2; in vepu510_h265e_tune_stat_update()320 fb->st_madp = madp_th_cnt0 * regs_set->reg_rc_roi.madp_st_thd0.madp_th0 + in vepu510_h265e_tune_stat_update()321 madp_th_cnt1 * (regs_set->reg_rc_roi.madp_st_thd0.madp_th0 + in vepu510_h265e_tune_stat_update()322 regs_set->reg_rc_roi.madp_st_thd0.madp_th1) / 2 + in vepu510_h265e_tune_stat_update()[all …]
861 Vepu511RcRoi *reg_klut = ®s->reg_rc_roi; in vepu511_h265_set_prep()1262 Vepu511RcRoi *reg_rc = ®s->reg_rc_roi; in vepu511_h265_set_rc_regs()1765 Vepu511RcRoi *reg_rc = ®s->reg_rc_roi; in vepu511_h265_set_rdo_regs()2082 Vepu511RcRoi *rc_regs = ®s->reg_rc_roi; in vepu511_h265_set_aq()2156 regs->reg_rc_roi.madi_st_thd.madi_th0 = 5; in vepu511_h265_global_cfg_set()2157 regs->reg_rc_roi.madi_st_thd.madi_th1 = 12; in vepu511_h265_global_cfg_set()2158 regs->reg_rc_roi.madi_st_thd.madi_th2 = 20; in vepu511_h265_global_cfg_set()2160 regs->reg_rc_roi.madp_st_thd0.madp_th0 = 4 << 4; in vepu511_h265_global_cfg_set()2161 regs->reg_rc_roi.madp_st_thd0.madp_th1 = 9 << 4; in vepu511_h265_global_cfg_set()2163 regs->reg_rc_roi.madp_st_thd1.madp_th2 = 15 << 4; in vepu511_h265_global_cfg_set()[all …]
1018 regs->reg_rc_roi.madi_st_thd.madi_th0 = 5; in vepu510_h265_global_cfg_set()1019 regs->reg_rc_roi.madi_st_thd.madi_th1 = 12; in vepu510_h265_global_cfg_set()1020 regs->reg_rc_roi.madi_st_thd.madi_th2 = 20; in vepu510_h265_global_cfg_set()1022 regs->reg_rc_roi.madp_st_thd0.madp_th0 = 4 << 4; in vepu510_h265_global_cfg_set()1023 regs->reg_rc_roi.madp_st_thd0.madp_th1 = 9 << 4; in vepu510_h265_global_cfg_set()1025 regs->reg_rc_roi.madp_st_thd1.madp_th2 = 15 << 4; in vepu510_h265_global_cfg_set()1302 Vepu510RcRoi *reg_rc = ®s->reg_rc_roi; in vepu510_h265_set_rc_regs()1945 Vepu510RcRoi *reg_klut = ®s->reg_rc_roi; in hal_h265e_v510_gen_regs()2057 vepu510_set_roi(®s->reg_rc_roi.roi_cfg, ctx->roi_data, in hal_h265e_v510_gen_regs()2133 cfg.reg = &hw_regs->reg_rc_roi; in hal_h265e_v510_start()[all …]
427 hevc_vepu540c_rc_roi *rc_regs = ®s->reg_rc_roi; in vepu540c_h265_global_cfg_set()711 hevc_vepu540c_rc_roi *reg_rc = ®s->reg_rc_roi; in vepu540c_h265_set_rc_regs()1203 hevc_vepu540c_rc_roi *reg_klut = ®s->reg_rc_roi; in hal_h265e_v540c_gen_regs()1314 vepu540c_set_roi(®s->reg_rc_roi.roi_cfg, ctx->roi_data, in hal_h265e_v540c_gen_regs()1380 cfg.reg = &hw_regs->reg_rc_roi; in hal_h265e_v540c_start()1391 regs = (RK_U32*)&hw_regs->reg_rc_roi; in hal_h265e_v540c_start()
810 Vepu510RcRoi reg_rc_roi; member
1072 hevc_vepu540c_rc_roi reg_rc_roi; member
1562 Vepu511RcRoi reg_rc_roi; member
763 regs->reg_rc_roi.klut_ofst.chrm_klut_ofst = 6; in setup_vepu540c_rdo_pred()765 regs->reg_rc_roi.klut_ofst.chrm_klut_ofst = 9; in setup_vepu540c_rdo_pred()910 regs->reg_rc_roi.roi_qthd0.qpmin_area0 = qp_min; in setup_vepu540c_rc_base()911 regs->reg_rc_roi.roi_qthd0.qpmax_area0 = qp_max; in setup_vepu540c_rc_base()912 regs->reg_rc_roi.roi_qthd0.qpmin_area1 = qp_min; in setup_vepu540c_rc_base()913 regs->reg_rc_roi.roi_qthd0.qpmax_area1 = qp_max; in setup_vepu540c_rc_base()914 regs->reg_rc_roi.roi_qthd0.qpmin_area2 = qp_min; in setup_vepu540c_rc_base()916 regs->reg_rc_roi.roi_qthd1.qpmax_area2 = qp_max; in setup_vepu540c_rc_base()917 regs->reg_rc_roi.roi_qthd1.qpmin_area3 = qp_min; in setup_vepu540c_rc_base()918 regs->reg_rc_roi.roi_qthd1.qpmax_area3 = qp_max; in setup_vepu540c_rc_base()[all …]
1120 regs->reg_rc_roi.klut_ofst.chrm_klut_ofst = 6; in setup_vepu511_rdo_pred()1126 regs->reg_rc_roi.klut_ofst.chrm_klut_ofst = is_ipc_scene ? 9 : 6; in setup_vepu511_rdo_pred()1176 regs->reg_rc_roi.roi_qthd0.qpmin_area0 = qp_min; in setup_vepu511_rc_base()1177 regs->reg_rc_roi.roi_qthd0.qpmax_area0 = qp_max; in setup_vepu511_rc_base()1178 regs->reg_rc_roi.roi_qthd0.qpmin_area1 = qp_min; in setup_vepu511_rc_base()1179 regs->reg_rc_roi.roi_qthd0.qpmax_area1 = qp_max; in setup_vepu511_rc_base()1180 regs->reg_rc_roi.roi_qthd0.qpmin_area2 = qp_min; in setup_vepu511_rc_base()1182 regs->reg_rc_roi.roi_qthd1.qpmax_area2 = qp_max; in setup_vepu511_rc_base()1183 regs->reg_rc_roi.roi_qthd1.qpmin_area3 = qp_min; in setup_vepu511_rc_base()1184 regs->reg_rc_roi.roi_qthd1.qpmax_area3 = qp_max; in setup_vepu511_rc_base()[all …]
1137 regs->reg_rc_roi.klut_ofst.chrm_klut_ofst = 6; in setup_vepu510_rdo_pred()1139 regs->reg_rc_roi.klut_ofst.chrm_klut_ofst = is_ipc_scene ? 9 : 6; in setup_vepu510_rdo_pred()1182 regs->reg_rc_roi.roi_qthd0.qpmin_area0 = qp_min; in setup_vepu510_rc_base()1183 regs->reg_rc_roi.roi_qthd0.qpmax_area0 = qp_max; in setup_vepu510_rc_base()1184 regs->reg_rc_roi.roi_qthd0.qpmin_area1 = qp_min; in setup_vepu510_rc_base()1185 regs->reg_rc_roi.roi_qthd0.qpmax_area1 = qp_max; in setup_vepu510_rc_base()1186 regs->reg_rc_roi.roi_qthd0.qpmin_area2 = qp_min; in setup_vepu510_rc_base()1188 regs->reg_rc_roi.roi_qthd1.qpmax_area2 = qp_max; in setup_vepu510_rc_base()1189 regs->reg_rc_roi.roi_qthd1.qpmin_area3 = qp_min; in setup_vepu510_rc_base()1190 regs->reg_rc_roi.roi_qthd1.qpmax_area3 = qp_max; in setup_vepu510_rc_base()[all …]
633 Vepu510RcRoi reg_rc_roi; member
1068 Vepu540cRcRoiCfg reg_rc_roi; member
1195 Vepu511RcRoi reg_rc_roi; member