Searched refs:reg64 (Results 1 – 15 of 15) sorted by relevance
30 } reg64; member
31 } reg64; member
28 } reg64; member
583 } reg64; /* 0x0100 */ member927 } reg64; /* 0x0300 */ member1271 } reg64; /* 0x0500 */ member1615 } reg64; /* 0x0700 */ member
757 } reg64; // 0x0300 member
764 dst_reg->sharp.reg64.sw_peaking4_ratio_n23 = peaking_ctrl_ratio_N23[4]; in set_shp_to_vdpp2_reg()765 dst_reg->sharp.reg64.sw_peaking4_ratio_p01 = peaking_ctrl_ratio_P01[4]; in set_shp_to_vdpp2_reg()
742 hw_regs->h265d_param.reg64.h26x_rps_mode = 0; in hal_h265d_vdpu382_gen_regs()743 hw_regs->h265d_param.reg64.h26x_frame_orslice = 0; in hal_h265d_vdpu382_gen_regs()744 hw_regs->h265d_param.reg64.h26x_stream_mode = 0; in hal_h265d_vdpu382_gen_regs()
953 hw_regs->h265d_param.reg64.h26x_rps_mode = 0; in hal_h265d_vdpu34x_gen_regs()954 hw_regs->h265d_param.reg64.h26x_frame_orslice = 0; in hal_h265d_vdpu34x_gen_regs()955 hw_regs->h265d_param.reg64.h26x_stream_mode = 0; in hal_h265d_vdpu34x_gen_regs()
672 vp9_hw_regs->vp9d_param.reg64.cprheader_offset = 0; in hal_vp9d_vdpu34x_gen_regs()
682 vp9_hw_regs->vp9d_param.reg64.cprheader_offset = 0; in hal_vp9d_vdpu382_gen_regs()