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Searched refs:reg10 (Results 1 – 15 of 15) sorted by relevance

/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp.c454 VDPP_DBG(VDPP_DBG_INT, "ro_frm_done_sts=%d\n", reg->common.reg10.ro_frm_done_sts); in vdpp_done()
455 VDPP_DBG(VDPP_DBG_INT, "ro_osd_max_sts=%d\n", reg->common.reg10.ro_osd_max_sts); in vdpp_done()
456 VDPP_DBG(VDPP_DBG_INT, "ro_bus_error_sts=%d\n", reg->common.reg10.ro_bus_error_sts); in vdpp_done()
457 VDPP_DBG(VDPP_DBG_INT, "ro_timeout_sts=%d\n", reg->common.reg10.ro_timeout_sts); in vdpp_done()
458 VDPP_DBG(VDPP_DBG_INT, "ro_config_error_sts=%d\n", reg->common.reg10.ro_timeout_sts); in vdpp_done()
461 !reg->common.reg10.ro_frm_done_sts) { in vdpp_done()
H A Dvdpp_reg.h96 } reg10; // 0x0028, read only member
H A Dvdpp_common.h118 } reg10; /* 0x00A8 */ member
313 } reg10; /* 0x0028 */ member
657 } reg10; /* 0x0228 */ member
1001 } reg10; /* 0x0428 */ member
1345 } reg10; /* 0x0628 */ member
1701 RK_U32 reg10; /* 0x0828 */ member
H A Dvdpp2.c465 dst_reg->es.reg10.lut_y0 = p_es_param->es_iDiff2conf_lut_y[0]; in set_es_to_vdpp2_reg()
466 dst_reg->es.reg10.lut_y1 = p_es_param->es_iDiff2conf_lut_y[1]; in set_es_to_vdpp2_reg()
467 dst_reg->es.reg10.lut_y2 = p_es_param->es_iDiff2conf_lut_y[2]; in set_es_to_vdpp2_reg()
468 dst_reg->es.reg10.lut_y3 = p_es_param->es_iDiff2conf_lut_y[3]; in set_es_to_vdpp2_reg()
1945 VDPP2_DBG(VDPP2_DBG_INT, "ro_frm_done_sts=%d\n", reg->common.reg10.ro_frm_done_sts); in vdpp2_done()
1946 VDPP2_DBG(VDPP2_DBG_INT, "ro_osd_max_sts=%d\n", reg->common.reg10.ro_osd_max_sts); in vdpp2_done()
1947 VDPP2_DBG(VDPP2_DBG_INT, "ro_bus_error_sts=%d\n", reg->common.reg10.ro_bus_error_sts); in vdpp2_done()
1948 VDPP2_DBG(VDPP2_DBG_INT, "ro_timeout_sts=%d\n", reg->common.reg10.ro_timeout_sts); in vdpp2_done()
1949 VDPP2_DBG(VDPP2_DBG_INT, "ro_config_error_sts=%d\n", reg->common.reg10.ro_timeout_sts); in vdpp2_done()
1952 !reg->common.reg10.ro_frm_done_sts) { in vdpp2_done()
H A Dvdpp_common.c723 dmsr->reg10.sw_dmsr_edge_k_6 = adj_mapping_k[6]; in set_dmsr_to_vdpp_reg()
724 dmsr->reg10.sw_dmsr_dir_contrast_conf_f = contrast2conf_mapping_k; in set_dmsr_to_vdpp_reg()
H A Dvdpp2_reg.h117 } reg10; // 0x0028, read only member
293 } reg10; // 0x0128 member
/rockchip-linux_mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_vdpu383.c243 ctrl_regs->reg10.strmd_auto_gating_e = 1; in init_ctrl_regs()
244 ctrl_regs->reg10.inter_auto_gating_e = 1; in init_ctrl_regs()
245 ctrl_regs->reg10.intra_auto_gating_e = 1; in init_ctrl_regs()
246 ctrl_regs->reg10.transd_auto_gating_e = 1; in init_ctrl_regs()
247 ctrl_regs->reg10.recon_auto_gating_e = 1; in init_ctrl_regs()
248 ctrl_regs->reg10.filterd_auto_gating_e = 1; in init_ctrl_regs()
249 ctrl_regs->reg10.bus_auto_gating_e = 1; in init_ctrl_regs()
250 ctrl_regs->reg10.ctrl_auto_gating_e = 1; in init_ctrl_regs()
251 ctrl_regs->reg10.rcb_auto_gating_e = 1; in init_ctrl_regs()
252 ctrl_regs->reg10.err_prc_auto_gating_e = 1; in init_ctrl_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu384a.c549 ctrl_regs->reg10.strmd_auto_gating_e = 1; in init_ctrl_regs()
550 ctrl_regs->reg10.inter_auto_gating_e = 1; in init_ctrl_regs()
551 ctrl_regs->reg10.intra_auto_gating_e = 1; in init_ctrl_regs()
552 ctrl_regs->reg10.transd_auto_gating_e = 1; in init_ctrl_regs()
553 ctrl_regs->reg10.recon_auto_gating_e = 1; in init_ctrl_regs()
554 ctrl_regs->reg10.filterd_auto_gating_e = 1; in init_ctrl_regs()
555 ctrl_regs->reg10.bus_auto_gating_e = 1; in init_ctrl_regs()
556 ctrl_regs->reg10.ctrl_auto_gating_e = 1; in init_ctrl_regs()
557 ctrl_regs->reg10.rcb_auto_gating_e = 1; in init_ctrl_regs()
558 ctrl_regs->reg10.err_prc_auto_gating_e = 1; in init_ctrl_regs()
H A Dhal_h264d_vdpu383.c594 ctrl_regs->reg10.strmd_auto_gating_e = 1; in init_ctrl_regs()
595 ctrl_regs->reg10.inter_auto_gating_e = 1; in init_ctrl_regs()
596 ctrl_regs->reg10.intra_auto_gating_e = 1; in init_ctrl_regs()
597 ctrl_regs->reg10.transd_auto_gating_e = 1; in init_ctrl_regs()
598 ctrl_regs->reg10.recon_auto_gating_e = 1; in init_ctrl_regs()
599 ctrl_regs->reg10.filterd_auto_gating_e = 1; in init_ctrl_regs()
600 ctrl_regs->reg10.bus_auto_gating_e = 1; in init_ctrl_regs()
601 ctrl_regs->reg10.ctrl_auto_gating_e = 1; in init_ctrl_regs()
602 ctrl_regs->reg10.rcb_auto_gating_e = 1; in init_ctrl_regs()
603 ctrl_regs->reg10.err_prc_auto_gating_e = 1; in init_ctrl_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_vdpu383.c1023 vp9_hw_regs->ctrl_regs.reg10.strmd_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1024 vp9_hw_regs->ctrl_regs.reg10.inter_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1025 vp9_hw_regs->ctrl_regs.reg10.intra_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1026 vp9_hw_regs->ctrl_regs.reg10.transd_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1027 vp9_hw_regs->ctrl_regs.reg10.recon_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1028 vp9_hw_regs->ctrl_regs.reg10.filterd_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1029 vp9_hw_regs->ctrl_regs.reg10.bus_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1030 vp9_hw_regs->ctrl_regs.reg10.ctrl_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1031 vp9_hw_regs->ctrl_regs.reg10.rcb_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
1032 vp9_hw_regs->ctrl_regs.reg10.err_prc_auto_gating_e = 1; in hal_vp9d_vdpu383_gen_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_vdpu384a.c1015 hw_regs->ctrl_regs.reg10.strmd_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1016 hw_regs->ctrl_regs.reg10.inter_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1017 hw_regs->ctrl_regs.reg10.intra_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1018 hw_regs->ctrl_regs.reg10.transd_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1019 hw_regs->ctrl_regs.reg10.recon_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1020 hw_regs->ctrl_regs.reg10.filterd_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1021 hw_regs->ctrl_regs.reg10.bus_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1022 hw_regs->ctrl_regs.reg10.ctrl_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1023 hw_regs->ctrl_regs.reg10.rcb_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
1024 hw_regs->ctrl_regs.reg10.err_prc_auto_gating_e = 1; in hal_h265d_vdpu384a_gen_regs()
H A Dhal_h265d_vdpu383.c1082 hw_regs->ctrl_regs.reg10.strmd_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1083 hw_regs->ctrl_regs.reg10.inter_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1084 hw_regs->ctrl_regs.reg10.intra_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1085 hw_regs->ctrl_regs.reg10.transd_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1086 hw_regs->ctrl_regs.reg10.recon_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1087 hw_regs->ctrl_regs.reg10.filterd_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1088 hw_regs->ctrl_regs.reg10.bus_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1089 hw_regs->ctrl_regs.reg10.ctrl_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1090 hw_regs->ctrl_regs.reg10.rcb_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1091 hw_regs->ctrl_regs.reg10.err_prc_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/av1d/
H A Dhal_av1d_vdpu383.c2236 regs->ctrl_regs.reg10.strmd_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2237 regs->ctrl_regs.reg10.inter_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2238 regs->ctrl_regs.reg10.intra_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2239 regs->ctrl_regs.reg10.transd_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2240 regs->ctrl_regs.reg10.recon_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2241 regs->ctrl_regs.reg10.filterd_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2242 regs->ctrl_regs.reg10.bus_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2243 regs->ctrl_regs.reg10.ctrl_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2244 regs->ctrl_regs.reg10.rcb_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
2245 regs->ctrl_regs.reg10.err_prc_auto_gating_e = 1; in vdpu383_av1d_gen_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/inc/
H A Dvdpu383_com.h88 } reg10; member
H A Dvdpu384a_com.h106 } reg10; member