Searched refs:rc_regs (Results 1 – 4 of 4) sorted by relevance
385 hevc_vepu580_rc_klut *rc_regs = ®s->reg_rc_klut; in vepu580_h265e_tune_reg_patch() local412 rc_regs->md_sad_thd.md_sad_thd0 = 7; in vepu580_h265e_tune_reg_patch()413 rc_regs->md_sad_thd.md_sad_thd1 = 15; in vepu580_h265e_tune_reg_patch()414 rc_regs->md_sad_thd.md_sad_thd2 = 25; in vepu580_h265e_tune_reg_patch()415 rc_regs->madi_thd.madi_thd0 = 4; in vepu580_h265e_tune_reg_patch()416 rc_regs->madi_thd.madi_thd1 = 9; in vepu580_h265e_tune_reg_patch()417 rc_regs->madi_thd.madi_thd2 = 15; in vepu580_h265e_tune_reg_patch()486 rc_regs->klut_ofst.chrm_klut_ofst = chrm_klut_ofst[scene_motion_flag]; in vepu580_h265e_tune_reg_patch()
2082 Vepu511RcRoi *rc_regs = ®s->reg_rc_roi; in vepu511_h265_set_aq() local2097 rc_regs->aq_stp0.aq_stp_s0 = aq_step[0] & 0x1f; in vepu511_h265_set_aq()2098 rc_regs->aq_stp0.aq_stp_0t1 = aq_step[1] & 0x1f; in vepu511_h265_set_aq()2099 rc_regs->aq_stp0.aq_stp_1t2 = aq_step[2] & 0x1f; in vepu511_h265_set_aq()2100 rc_regs->aq_stp0.aq_stp_2t3 = aq_step[3] & 0x1f; in vepu511_h265_set_aq()2101 rc_regs->aq_stp0.aq_stp_3t4 = aq_step[4] & 0x1f; in vepu511_h265_set_aq()2102 rc_regs->aq_stp0.aq_stp_4t5 = aq_step[5] & 0x1f; in vepu511_h265_set_aq()2103 rc_regs->aq_stp1.aq_stp_5t6 = aq_step[6] & 0x1f; in vepu511_h265_set_aq()2104 rc_regs->aq_stp1.aq_stp_6t7 = aq_step[7] & 0x1f; in vepu511_h265_set_aq()2105 rc_regs->aq_stp1.aq_stp_7t8 = 0; in vepu511_h265_set_aq()[all …]
1336 hevc_vepu580_rc_klut *rc_regs = ®s->reg_rc_klut; in vepu580_h265_global_cfg_set() local1349 rc_regs->aq_tthd[i] = hw->aq_thrd_i[i]; in vepu580_h265_global_cfg_set()1350 rc_regs->aq_step[i] = hw->aq_step_i[i] & 0x3f; in vepu580_h265_global_cfg_set()1355 rc_regs->aq_tthd[i] = hw->aq_thrd_p[i]; in vepu580_h265_global_cfg_set()1356 rc_regs->aq_step[i] = hw->aq_step_p[i] & 0x3f; in vepu580_h265_global_cfg_set()1361 rc_regs->madi_cfg.madi_mode = 0; in vepu580_h265_global_cfg_set()1362 rc_regs->madi_cfg.madi_thd = 25; in vepu580_h265_global_cfg_set()1363 rc_regs->md_sad_thd.md_sad_thd0 = 20; in vepu580_h265_global_cfg_set()1364 rc_regs->md_sad_thd.md_sad_thd1 = 30; in vepu580_h265_global_cfg_set()1365 rc_regs->md_sad_thd.md_sad_thd2 = 40; in vepu580_h265_global_cfg_set()[all …]
427 hevc_vepu540c_rc_roi *rc_regs = ®s->reg_rc_roi; in vepu540c_h265_global_cfg_set() local434 rc_regs->aq_tthd[i] = hw->aq_thrd_i[i]; in vepu540c_h265_global_cfg_set()435 rc_regs->aq_step[i] = hw->aq_step_i[i] & 0x3f; in vepu540c_h265_global_cfg_set()441 rc_regs->aq_tthd[i] = hw->aq_thrd_p[i]; in vepu540c_h265_global_cfg_set()442 rc_regs->aq_step[i] = hw->aq_step_p[i] & 0x3f; in vepu540c_h265_global_cfg_set()