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Searched refs:anatop (Results 1 – 13 of 13) sorted by relevance

/rk3399_rockchip-uboot/drivers/thermal/
H A Dimx_thermal.c55 struct anatop_regs *anatop = (struct anatop_regs *)pdata->regs; in read_cpu_temperature() local
102 writel(TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_clr); in read_cpu_temperature()
103 writel(MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set); in read_cpu_temperature()
106 reg = readl(&anatop->tempsense1); in read_cpu_temperature()
109 writel(reg, &anatop->tempsense1); in read_cpu_temperature()
112 writel(TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_clr); in read_cpu_temperature()
113 writel(TEMPSENSE0_FINISHED, &anatop->tempsense0_clr); in read_cpu_temperature()
114 writel(TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_set); in read_cpu_temperature()
117 while ((readl(&anatop->tempsense0) & in read_cpu_temperature()
122 reg = readl(&anatop->tempsense0); in read_cpu_temperature()
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dimx6sl.dtsi512 anatop: anatop@020c8000 { label
513 compatible = "fsl,imx6sl-anatop",
514 "fsl,imx6q-anatop",
522 compatible = "fsl,anatop-regulator";
527 anatop-reg-offset = <0x110>;
528 anatop-vol-bit-shift = <8>;
529 anatop-vol-bit-width = <5>;
530 anatop-min-bit-val = <4>;
531 anatop-min-voltage = <800000>;
532 anatop-max-voltage = <1375000>;
[all …]
H A Dimx6qdl.dtsi618 anatop: anatop@020c8000 { label
619 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
626 compatible = "fsl,anatop-regulator";
631 anatop-reg-offset = <0x110>;
632 anatop-vol-bit-shift = <8>;
633 anatop-vol-bit-width = <5>;
634 anatop-min-bit-val = <4>;
635 anatop-min-voltage = <800000>;
636 anatop-max-voltage = <1375000>;
640 compatible = "fsl,anatop-regulator";
[all …]
H A Dimx6sx.dtsi559 anatop: anatop@020c8000 { label
560 compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop",
568 compatible = "fsl,anatop-regulator";
573 anatop-reg-offset = <0x110>;
574 anatop-vol-bit-shift = <8>;
575 anatop-vol-bit-width = <5>;
576 anatop-min-bit-val = <4>;
577 anatop-min-voltage = <800000>;
578 anatop-max-voltage = <1375000>;
582 compatible = "fsl,anatop-regulator";
[all …]
H A Dimx6ul.dtsi518 anatop: anatop@020c8000 { label
519 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
527 compatible = "fsl,anatop-regulator";
531 anatop-reg-offset = <0x120>;
532 anatop-vol-bit-shift = <8>;
533 anatop-vol-bit-width = <5>;
534 anatop-min-bit-val = <0>;
535 anatop-min-voltage = <2625000>;
536 anatop-max-voltage = <3400000>;
537 anatop-enable-bit = <0>;
[all …]
H A Dimx6ull.dtsi610 anatop: anatop@020c8000 { label
611 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
619 compatible = "fsl,anatop-regulator";
623 anatop-reg-offset = <0x120>;
624 anatop-vol-bit-shift = <8>;
625 anatop-vol-bit-width = <5>;
626 anatop-min-bit-val = <0>;
627 anatop-min-voltage = <2625000>;
628 anatop-max-voltage = <3400000>;
629 anatop-enable-bit = <0>;
[all …]
H A Dimx6sll.dtsi501 anatop: anatop@020c8000 { label
502 compatible = "fsl,imx6sll-anatop",
503 "fsl,imx6q-anatop",
511 compatible = "fsl,anatop-regulator";
515 anatop-reg-offset = <0x120>;
516 anatop-vol-bit-shift = <8>;
517 anatop-vol-bit-width = <5>;
518 anatop-min-bit-val = <0>;
519 anatop-min-voltage = <2625000>;
520 anatop-max-voltage = <3400000>;
[all …]
H A Dimx7s.dtsi501 anatop: anatop@30360000 { label
502 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
509 compatible = "fsl,anatop-regulator";
513 anatop-reg-offset = <0x210>;
514 anatop-vol-bit-shift = <8>;
515 anatop-vol-bit-width = <5>;
516 anatop-min-bit-val = <8>;
517 anatop-min-voltage = <800000>;
518 anatop-max-voltage = <1200000>;
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dsoc.c68 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in get_cpu_rev() local
69 u32 reg = readl(&anatop->digprog_sololite); in get_cpu_rev()
74 reg = readl(&anatop->digprog); in get_cpu_rev()
229 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in clear_ldo_ramp() local
236 reg = readl(&anatop->ana_misc2); in clear_ldo_ramp()
238 writel(reg, &anatop->ana_misc2); in clear_ldo_ramp()
250 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in set_ldo_voltage() local
251 u32 val, step, old, reg = readl(&anatop->reg_core); in set_ldo_voltage()
287 writel(reg, &anatop->reg_core); in set_ldo_voltage()
328 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in init_bandgap() local
[all …]
H A Dclock.c911 struct anatop_regs __iomem *anatop = in enable_fec_anatop_clock() local
917 reg = readl(&anatop->pll_enet); in enable_fec_anatop_clock()
935 writel(reg, &anatop->pll_enet); in enable_fec_anatop_clock()
937 if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_ENET_LOCK) in enable_fec_anatop_clock()
950 writel(reg, &anatop->pll_enet); in enable_fec_anatop_clock()
1195 struct anatop_regs __iomem *anatop = in enable_pll3() local
1199 if ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
1203 &anatop->usb1_pll_480_ctrl_set); in enable_pll3()
1204 writel(0x80, &anatop->ana_misc2_clr); in enable_pll3()
1206 while ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
[all …]
/rk3399_rockchip-uboot/drivers/usb/host/
H A Dehci-mx6.c104 struct anatop_regs __iomem *anatop = in usb_power_config()
112 chrg_detect = &anatop->usb1_chrg_detect; in usb_power_config()
113 pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr; in usb_power_config()
114 pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set; in usb_power_config()
117 chrg_detect = &anatop->usb2_chrg_detect; in usb_power_config()
118 pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr; in usb_power_config()
119 pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set; in usb_power_config()
/rk3399_rockchip-uboot/board/udoo/neo/
H A Dneo.c273 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in setup_fec() local
285 reg = readl(&anatop->pll_enet); in setup_fec()
287 writel(reg, &anatop->pll_enet); in setup_fec()
/rk3399_rockchip-uboot/board/freescale/mx6sxsabresd/
H A Dmx6sxsabresd.c155 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in setup_fec() local
176 reg = readl(&anatop->pll_enet); in setup_fec()
178 writel(reg, &anatop->pll_enet); in setup_fec()