Searched refs:cycle (Results 1 – 13 of 13) sorted by relevance
| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/src/ |
| H A D | stopwatch.c | 32 unsigned int cycle; in stopwatch_set_usecs() local
36 cycle = US_TO_CYCLE(usecs); in stopwatch_set_usecs()
37 mmio_write_32(SYST_RVR, cycle); in stopwatch_set_usecs()
|
| /rk3399_ARM-atf/docs/perf/ |
| H A D | performance-monitoring-unit.rst | 22 - A dedicated cycle counter: ``PMCCNTR``.
47 configures it. The cycle counter has the ``PMCCFILTR_EL0`` register, which has
127 - If set to ``1`` enables the cycle counter ``PMCCNTR``.
134 - If set to ``1`` it disables the cycle counter ``PMCCNTR`` where event
|
| H A D | psci-performance-instr.rst | 102 The service captures the cycle count, which allows for the time spent in the
|
| /rk3399_ARM-atf/docs/process/ |
| H A D | security-hardening.rst | 85 - ``SCCD`` for the cycle counter.
92 - Prohibit general event counters and the cycle counter:
109 - Prohibit cycle counter: ``MDCR_EL3.SPME == 0 && PMCR_EL0.DP == 1``.
115 - Prohibit cycle counter: ``MDCR_EL3.SCCD == 1``
|
| H A D | platform-ports-policy.rst | 29 interface will be removed. This must be at least 1 full release cycle in future.
|
| /rk3399_ARM-atf/docs/resources/diagrams/plantuml/ |
| H A D | rse_attestation_flow.puml | 38 Rnote over RMM: Platform token is\n\ cached. It is not\n\ changing within\n\ a power cycle.
|
| /rk3399_ARM-atf/docs/security_advisories/ |
| H A D | security-advisory-tfv-5.rst | 32 bit is set to zero, the cycle counter (when enabled) counts during secure world
|
| /rk3399_ARM-atf/docs/about/ |
| H A D | lts.rst | 102 Given that many products that have a release cycle, have a yearly release
103 cycle, it would make sense to have yearly TF-A releases.
332 #. Gather feedback from the test and debug cycle
|
| /rk3399_ARM-atf/docs/threat_model/firmware_threat_model/ |
| H A D | threat_model_el3_spm.rst | 24 - Focus on the run-time part of the life-cycle (no specific emphasis on boot
|
| H A D | threat_model.rst | 1150 | | | General events and cycle counting in the Secure |
|
| /rk3399_ARM-atf/docs/threat_model/ |
| H A D | supply_chain_threat_model.rst | 602 | | on the official | strength follows | monthly cycle |
|
| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | 924 registers when the cluster goes through a power cycle. This is disabled by
|
| /rk3399_ARM-atf/docs/ |
| H A D | change-log.md | 8050 …- manage cards power cycle ([258bef9](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trus…
11149 resume, Update DDR setting rev.0.35, qos: change subslot cycle, Change
11241 secure world entry/exit from/to Non-secure state, and cycle counting gets
11247 cycle counting gets disabled by setting PMCR_EL0.DP bit.
12099 - Control register PMCR_EL0 / PMCR is set to prohibit cycle counting in the
|