| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | asm_macros.S | 174 .macro _mov_imm16 _reg, _val, _shift argument 175 .if (\_val >> \_shift) & 0xffff 176 .if (\_val & (1 << \_shift - 1)) 177 movk \_reg, (\_val >> \_shift) & 0xffff, LSL \_shift 179 mov \_reg, \_val & (0xffff << \_shift)
|
| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | clk-stm32-core.h | 141 #define MASK_WIDTH_SHIFT(_width, _shift) \ argument 142 GENMASK(((_width) + (_shift) - 1U), (_shift))
|
| H A D | stm32mp1_clk.c | 123 #define DIV_CFG(_id, _offset, _shift, _width, _bitrdy)\ argument 126 .shift = (_shift),\ 153 #define MUXRDY_CFG(_id, _offset, _shift, _width, _bitrdy)\ argument 156 .shift = (_shift),\ 161 #define MUX_CFG(_id, _offset, _shift, _width)\ argument 162 MUXRDY_CFG(_id, _offset, _shift, _width, MUX_NO_BIT_RDY) 211 #define MASK_WIDTH_SHIFT(_width, _shift) \ argument 212 GENMASK(((_width) + (_shift) - 1U), (_shift))
|
| H A D | clk-stm32mp13.c | 379 #define MUX_CFG(id, src, _offset, _shift, _witdh)[id] = {\ argument 384 .shift = (_shift),\ 390 #define MUX_RDY_CFG(id, src, _offset, _shift, _witdh)[id] = {\ argument 395 .shift = (_shift),\ 777 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\ argument 779 .shift = _shift,\ 848 #define DRIVE(_offset, _shift, _width, _default) &(struct stm32_clk_drive){\ argument 850 .drv_shift = (_shift),\
|
| H A D | clk-stm32mp2.c | 322 #define MUX_CONF(id, src, _offset, _shift, _witdh)[id] = {\ argument 327 .shift = (_shift),\ 615 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\ argument 617 .shift = _shift,\ 659 #define DRIVE(_offset, _shift, _width, _default) &(struct stm32_clk_drive){\ argument 661 .drv_shift = (_shift),\
|