Searched refs:_PLL2 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 426 _PLL2, enumerator
816 _CLK_PLL(_PLL2, PLL_1600,
1147 clock = stm32mp1_read_pll_freq(_PLL2, _DIV_P); in get_clock_rate()
1267 clock = stm32mp1_read_pll_freq(_PLL2, _DIV_P); in get_clock_rate()
1270 clock = stm32mp1_read_pll_freq(_PLL2, _DIV_Q); in get_clock_rate()
1273 clock = stm32mp1_read_pll_freq(_PLL2, _DIV_R); in get_clock_rate()
2193 ret = clk_get_pll1_settings(pll_conf[_PLL2].src, PLL1_NOMINAL_FREQ_IN_KHZ, in stm32mp1_clk_init()
2200 pll_conf[_PLL1].src = pll_conf[_PLL2].src; in stm32mp1_clk_init()
2451 pll_id = _PLL2; in get_parent_id_parent()
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| H A D | clk-stm32mp13.c | 841 _PLL2, enumerator
1319 struct stm32_pll_dt_cfg *pll2 = clk_stm32_pll_get_pdata(_PLL2); in clk_compute_pll1_settings()
1568 err = clk_stm32_pll_init(priv, _PLL2); in stm32_clk_pll_configure()
1685 CLK_PLL_CFG(_PLL2, _CK_PLL2, PLL_1600, RCC_PLL2CR),
1880 CLK_PLL(_CK_PLL2, PLL2, MUX(MUX_PLL12), GATE_PLL2, _PLL2, 0),
2275 for (i = _PLL2; i < pdata->npll; i++) { in stm32_clk_parse_fdt_all_pll()
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| H A D | clk-stm32mp2.c | 687 _PLL2, enumerator
719 CLK_PLL_CFG(_PLL2, _CK_PLL2, RCC_PLL2CFGR1),
1215 CLK_PLL(_CK_PLL2, PLL2_CK, MUX(MUX_MUXSEL6), _PLL2, 0),
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