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Searched refs:RW (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx93/
H A Dtrdc_config.h19 { 0, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
21 { 1, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
22 { 1, 1, SP(RW) | SU(R) | NP(RW) | NU(R) },
66 { 0, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
68 { 1, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
113 { 0, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
115 { 1, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
117 { 2, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
120 { 3, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
195 { 0, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
/rk3399_ARM-atf/plat/imx/imx8ulp/xrdc/
H A Dxrdc_config.h15 #define RW 6 macro
112 …{ 11, 0, 0x21170000, 0x10000, {0, 0, 1, 0, 0, 0, 0, 2}, {0xfff, SP(RW) | SU(RW) | NP(RW)} }, /* …
113 …180000, 0x10000, {0, 0, 1, 0, 0, 0, 0, 2}, {SP(RW) | SU(RW) | NP(RW) | NU(RW), SP(RW) | SU(RW) |…
114 …{ 12, 0, 0x2d400000, 0x100000, {0, 0, 0, 0, 0, 0, 0, 1}, {SP(RW) | SU(RW) | NP(RW) | NU(RW), 0} }…
/rk3399_ARM-atf/include/drivers/nxp/trdc/
H A Dimx_trdc.h50 #define RW U(6) macro
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-3.rst66 - The xlat\_tables library ensures that all Read-Write (RW) memory regions are
/rk3399_ARM-atf/docs/components/
H A Dromlib-design.rst128 - The ROM library needs a page aligned RAM section to hold the RW data. This
H A Dsecure-partition-manager-mm.rst414 4. Read Write data memory regions are mapped with RW data and Execute Never
767 A combination of attributes that mark the region with RW and Executable
/rk3399_ARM-atf/docs/design/
H A Dfirmware-design.rst595 PSTATE.RW = 1
718 PSTATE.RW = 1
1838 - BL2 is loaded below BL1 RW
2608 completed, the FVP changes the attributes of this section to ``RW``,
/rk3399_ARM-atf/docs/
H A Dporting-guide.rst477 address, size and attributes (Device/Memory, RO/RW, Secure/Non-Secure), as
1815 positioning of BL1’s RW data at the top of the memory layout.
H A Dchange-log.md1461 …- increase BL1 RW for PSA Crypto ([51bdb70](https://review.trustedfirmware.org/plugins/gitiles/TF-…
4604 …- increase BL1 RW area for PSA_CRYPTO implementation ([ce18938](https://review.trustedfirmware.org…
6456 …- add separate RO and RW NSAIDs ([986c4e9](https://review.trustedfirmware.org/plugins/gitiles/TF-A…
10825 - arm/sgi: Bump bl1 RW limit, mark remote chip shared ram as non-cacheable,
12884 - Support for reclaiming all BL1 RW memory and BL2 memory by overlaying the
12952 - Fully reclaimed all BL1 RW memory and BL2 memory on the FVP port by
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-options.rst76 the RW sections in RAM, while leaving the RO sections in place. This option