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Searched refs:POSTDIV2 (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp2_clk.h30 POSTDIV2, enumerator
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/soc/
H A Dsoc.h30 #define POSTDIV2(n) ((0x7 << (12 + 16)) | (n << 12)) macro
/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp2.c1682 pllcfg[POSTDIV2] & RCC_PLLxCFGR7_POSTDIV2_MASK); in clk_stm32_pll_config_output()
1684 if ((pllcfg[POSTDIV1] == 0U) || (pllcfg[POSTDIV2] == 0U)) { in clk_stm32_pll_config_output()
1763 pll_conf->cfg[POSTDIV1], pll_conf->cfg[POSTDIV2]); in _clk_stm32_pll1_init()
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c1970 POSTDIV2(pll_div.postdiv2) | POSTDIV1(pll_div.postdiv1) | in m0_configure_ddr()