Home
last modified time | relevance | path

Searched refs:DFD_TEST_SI_0 (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/dfd/
H A Dplat_dfd.c57 mmio_write_32(DFD_TEST_SI_0, DFD_TEST_SI_0_CACHE_DIS_VAL); in dfd_setup()
91 mmio_write_32(DFD_TEST_SI_0, DFD_TEST_SI_0_CACHE_EN_VAL); in dfd_setup()
H A Dplat_dfd.h37 #define DFD_TEST_SI_0 (MISC1_CFG_BASE + 0x58) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/dfd/
H A Dplat_dfd.h33 #define DFD_TEST_SI_0 (MISC1_CFG_BASE + 0x58) macro
H A Dplat_dfd.c35 mmio_write_32(DFD_TEST_SI_0, DFD_TEST_SI_0_VAL); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8188/
H A Dplat_dfd.h42 #define DFD_TEST_SI_0 (MISC1_CFG_BASE + 0x58) macro
H A Dplat_dfd.c36 mmio_write_32(DFD_TEST_SI_0, 0x0); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dfd/
H A Dplat_dfd.h45 #define DFD_TEST_SI_0 (MISC1_CFG_BASE + 0x58) macro
H A Dplat_dfd.c74 mmio_write_32(DFD_TEST_SI_0, 0x0); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8189/
H A Dplat_dfd.c22 { DFD_TEST_SI_0, 0x00000000 },
H A Dplat_dfd.h45 #define DFD_TEST_SI_0 (MCU_BIU_BASE + 0XE098) macro