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Searched refs:DDR_PHY_BASE_ADDR (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/drivers/marvell/
H A Dddr_phy_access.c31 mmio_write_16(DDR_PHY_BASE_ADDR + (2 * offset), data); in snps_fw_write()
43 *read = mmio_read_16(DDR_PHY_BASE_ADDR + (2 * offset)); in snps_fw_read()
H A Dddr_phy_access.h12 #define DDR_PHY_BASE_ADDR (DEVICE_BASE + DDR_PHY_OFFSET) macro
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/
H A Dplat_bl2_setup.c74 ret = mmap_add_dynamic_region(DDR_PHY_BASE_ADDR, DDR_PHY_BASE_ADDR, in plat_ddr_mmap_setup()
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/include/
H A Dplatform_def.h56 #define DDR_PHY_BASE_ADDR UL(0x40380000) macro