1*b81444e8SAlex Leibovich /* 2*b81444e8SAlex Leibovich * Copyright (C) 2021 Marvell International Ltd. 3*b81444e8SAlex Leibovich * 4*b81444e8SAlex Leibovich * SPDX-License-Identifier: BSD-3-Clause 5*b81444e8SAlex Leibovich * https://spdx.org/licenses 6*b81444e8SAlex Leibovich */ 7*b81444e8SAlex Leibovich 8*b81444e8SAlex Leibovich #include <plat_marvell.h> 9*b81444e8SAlex Leibovich 10*b81444e8SAlex Leibovich #define DEVICE_BASE 0xF0000000 11*b81444e8SAlex Leibovich #define DDR_PHY_OFFSET 0x1000000 12*b81444e8SAlex Leibovich #define DDR_PHY_BASE_ADDR (DEVICE_BASE + DDR_PHY_OFFSET) 13*b81444e8SAlex Leibovich 14*b81444e8SAlex Leibovich int mvebu_ddr_phy_write(uintptr_t offset, uint16_t data); 15*b81444e8SAlex Leibovich int mvebu_ddr_phy_read(uintptr_t offset, uint16_t *read); 16