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Searched refs:CPCCFG_REG_EMI_WFIFO (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/dcm/
H A Dmtk_dcm_utils.c469 ret &= ((mmio_read_32(CPCCFG_REG_EMI_WFIFO) & in dcm_cpccfg_reg_emi_wfifo_is_on()
480 mmio_clrsetbits_32(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo()
485 mmio_clrsetbits_32(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo()
H A Dmtk_dcm_utils.h20 #define CPCCFG_REG_EMI_WFIFO (CPCCFG_REG_BASE + 0x100) macro
/rk3399_ARM-atf/plat/mediatek/drivers/dcm/
H A Dmtk_dcm_utils.c384 return dcm_check_state(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo_is_on()
393 mmio_clrsetbits_32(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo()
398 mmio_clrsetbits_32(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo()
H A Dmtk_dcm_utils.h20 #define CPCCFG_REG_EMI_WFIFO (CPCCFG_REG_BASE + 0x100) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dcm/
H A Dmtk_dcm_utils.h28 #define CPCCFG_REG_EMI_WFIFO (CPCCFG_REG_BASE + 0x100) macro
H A Dmtk_dcm_utils.c463 ret &= ((mmio_read_32(CPCCFG_REG_EMI_WFIFO) & in dcm_cpccfg_reg_emi_wfifo_is_on()
474 mmio_clrsetbits_32(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo()
479 mmio_clrsetbits_32(CPCCFG_REG_EMI_WFIFO, in dcm_cpccfg_reg_emi_wfifo()