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Searched refs:CLKMGR_MAINPLL_PLLGLOB (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c112 mmio_clrbits_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB, in config_clkmgr_handoff()
132 mmio_write_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB, in config_clkmgr_handoff()
197 mmio_setbits_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB, in config_clkmgr_handoff()
237 mmio_setbits_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB, in config_clkmgr_handoff()
320 pllglob_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB; in get_clk_freq()
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_clock_manager.h45 #define CLKMGR_MAINPLL_PLLGLOB 0x48 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.h26 #define CLKMGR_MAINPLL_PLLGLOB 0x24 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h46 #define CLKMGR_MAINPLL_PLLGLOB 0x24 macro