Home
last modified time | relevance | path

Searched refs:CLKMGR_MAINPLL_PLLC0 (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.h30 #define CLKMGR_MAINPLL_PLLC0 0x34 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c140 mmio_write_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLC0, in config_clkmgr_handoff()
396 mpu_clk = get_clk_freq(CLKMGR_MAINPLL_NOCCLK, CLKMGR_MAINPLL_PLLC0, in get_mpu_clk()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h51 #define CLKMGR_MAINPLL_PLLC0 0x38 macro