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Searched refs:CLKMGR_MAINPLL_NOCDIV (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/n5x/soc/
H A Dn5x_clock_manager.c93 clock /= BIT(((get_clk_freq(CLKMGR_MAINPLL_NOCDIV)) >> in get_l4_clk()
132 clock /= BIT(((get_clk_freq(CLKMGR_MAINPLL_NOCDIV)) >> in get_mpu_clk()
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_clock_manager.h44 #define CLKMGR_MAINPLL_NOCDIV 0x44 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.h25 #define CLKMGR_MAINPLL_NOCDIV 0x20 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c154 mmio_write_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_NOCDIV, in config_clkmgr_handoff()
368 data32 = mmio_read_32(CLKMGR_MAINPLL + CLKMGR_MAINPLL_NOCDIV); in get_uart_clk()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h45 #define CLKMGR_MAINPLL_NOCDIV 0x20 macro