Home
last modified time | relevance | path

Searched refs:APU_MD32_SYSCTRL (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/apusys/apusys_rv/2.0/
H A Dapusys_rv.h48 #define MD32_SYS_CTRL (APU_MD32_SYSCTRL + 0x0000)
49 #define UP_INT_EN2 (APU_MD32_SYSCTRL + 0x000c)
50 #define MD32_CLK_CTRL (APU_MD32_SYSCTRL + 0x00b8)
51 #define UP_WAKE_HOST_MASK0 (APU_MD32_SYSCTRL + 0x00bc)
52 #define UP_WAKE_HOST_MASK1 (APU_MD32_SYSCTRL + 0x00c0)
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dplatform_def.h31 #define APU_MD32_SYSCTRL (IO_PHYS + 0x09001000) macro
/rk3399_ARM-atf/plat/mediatek/mt8196/include/
H A Dplatform_def.h40 #define APU_MD32_SYSCTRL (IO_PHYS + 0x09001000) macro