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Searched refs:pllxcfgr5 (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c1482 uintptr_t pllxcfgr5 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR5; in clk_stm32_pll_config_csg() local
1484 io_clrsetbits32(pllxcfgr5, RCC_PLLxCFGR5_DIVVAL_MASK, in clk_stm32_pll_config_csg()
1486 io_clrsetbits32(pllxcfgr5, RCC_PLLxCFGR5_SPREAD_MASK, in clk_stm32_pll_config_csg()
H A Dclk-stm32mp25.c1500 uintptr_t pllxcfgr5 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR5; in clk_stm32_pll_config_csg() local
1502 io_clrsetbits32(pllxcfgr5, RCC_PLLxCFGR5_DIVVAL_MASK, in clk_stm32_pll_config_csg()
1504 io_clrsetbits32(pllxcfgr5, RCC_PLLxCFGR5_SPREAD_MASK, in clk_stm32_pll_config_csg()