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/optee_os/lib/libmbedtls/mbedtls/library/
H A Dssl_cache.c24 void mbedtls_ssl_cache_init(mbedtls_ssl_cache_context *cache) in mbedtls_ssl_cache_init() argument
26 memset(cache, 0, sizeof(mbedtls_ssl_cache_context)); in mbedtls_ssl_cache_init()
28 cache->timeout = MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT; in mbedtls_ssl_cache_init()
29 cache->max_entries = MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES; in mbedtls_ssl_cache_init()
32 mbedtls_mutex_init(&cache->mutex); in mbedtls_ssl_cache_init()
37 static int ssl_cache_find_entry(mbedtls_ssl_cache_context *cache, in ssl_cache_find_entry() argument
48 for (cur = cache->chain; cur != NULL; cur = cur->next) { in ssl_cache_find_entry()
50 if (cache->timeout != 0 && in ssl_cache_find_entry()
51 (int) (t - cur->timestamp) > cache->timeout) { in ssl_cache_find_entry()
80 mbedtls_ssl_cache_context *cache = (mbedtls_ssl_cache_context *) data; in mbedtls_ssl_cache_get() local
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/optee_os/core/arch/arm/dts/
H A Dfsl-lx2160a.dtsi33 d-cache-size = <0x8000>;
34 d-cache-line-size = <64>;
35 d-cache-sets = <128>;
36 i-cache-size = <0xC000>;
37 i-cache-line-size = <64>;
38 i-cache-sets = <192>;
39 next-level-cache = <&cluster0_l2>;
50 d-cache-size = <0x8000>;
51 d-cache-line-size = <64>;
52 d-cache-sets = <128>;
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H A Dsama5d2.dtsi34 next-level-cache = <&L2>;
159 L2: cache-controller@a00000 {
160 compatible = "arm,pl310-cache";
163 cache-unified;
164 cache-level = <2>;
/optee_os/lib/libmbedtls/mbedtls/include/mbedtls/
H A Dssl_cache.h81 void mbedtls_ssl_cache_init(mbedtls_ssl_cache_context *cache);
150 void mbedtls_ssl_cache_set_timeout(mbedtls_ssl_cache_context *cache, int timeout);
161 static inline int mbedtls_ssl_cache_get_timeout(mbedtls_ssl_cache_context *cache) in mbedtls_ssl_cache_get_timeout() argument
163 return cache->MBEDTLS_PRIVATE(timeout); in mbedtls_ssl_cache_get_timeout()
174 void mbedtls_ssl_cache_set_max_entries(mbedtls_ssl_cache_context *cache, int max);
181 void mbedtls_ssl_cache_free(mbedtls_ssl_cache_context *cache);
/optee_os/core/drivers/crypto/versal/
H A Dipi.c97 goto cache; in versal_crypto_request()
100 goto cache; in versal_crypto_request()
105 cache: in versal_crypto_request()
/optee_os/core/arch/arm/kernel/
H A Darm32_sysreg.txt70 DCCIMVAC c7 0 c14 1 WO Data cache clean and invalidate by MVA PoC
71 DCCISW c7 0 c14 2 WO Data cache clean and invalidate by set/way
72 DCCMVAC c7 0 c10 1 WO Data cache clean by MVA PoC
73 DCCMVAU c7 0 c11 1 WO Data cache clean by MVA PoU
74 DCCSW c7 0 c10 2 WO Data cache clean by set/way
75 DCIMVAC c7 0 c6 1 WO Data cache invalidate by MVA PoC
76 DCISW c7 0 c6 2 WO Data cache invalidate by set/way
77 ICIALLU c7 0 c5 0 WOD Instruction cache invalidate all PoU
78 ICIALLUIS c7 0 c1 0 WOD Instruction cache invalidate all PoU, IS
79 ICIMVAU c7 0 c5 1 WO Instruction cache invalidate by MVA PoU
/optee_os/core/arch/arm/tee/
H A Dsub.mk8 srcs-y += cache.c
/optee_os/core/kernel/
H A Dthread.c780 struct thread_shm_cache *cache = &threads[thread_get_id()].shm_cache; in get_shm_cache_entry() local
783 SLIST_FOREACH(ce, cache, link) in get_shm_cache_entry()
790 SLIST_INSERT_HEAD(cache, ce, link); in get_shm_cache_entry()
850 void thread_rpc_shm_cache_clear(struct thread_shm_cache *cache) in thread_rpc_shm_cache_clear() argument
853 struct thread_shm_cache_entry *ce = SLIST_FIRST(cache); in thread_rpc_shm_cache_clear()
857 SLIST_REMOVE_HEAD(cache, link); in thread_rpc_shm_cache_clear()
/optee_os/core/include/kernel/
H A Dthread_private.h96 void thread_rpc_shm_cache_clear(struct thread_shm_cache *cache);
/optee_os/lib/libmbedtls/mbedtls/
H A DSECURITY.md54 to. Typical attack vectors include cache timings, memory bus contention and
H A DREADME.md180 CMake cache. This can be done with the following command using GNU find:
H A DChangeLog939 some cases involving a missing entry or a full cache.
1040 * Add new API mbedtls_ssl_cache_remove for cache entry removal by
1067 * Zeroize SSL cache entries when they are freed.
1914 * The getter and setter API of the SSL session cache (used for
2637 fixes a local Lucky 13 cache attack found and reported by Tuba Yavuz,
3640 plaintext of messages under some conditions by using a cache attack
3651 previous entry) by using a cache attack targeting the SSL input record
4316 against side-channel attacks like the cache attack described in
4937 * Add countermeasure against "Lucky 13 strikes back" cache-based attack,
5536 * Add countermeasure against "Lucky 13 strikes back" cache-based attack,
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/optee_os/
H A DCHANGELOG.md854 * pl310: fix cache sync ([#2035])
1322 world, especially by adding a cache for FS RPC payload data.
1323 - REE FS: use a single file per object, remove block cache.